wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
b216da5a6aabd626243daea72f6c0746bf8c070c
vortex/rtl
History
felsabbagh3 b216da5a6a ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
..
obj_dir
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
.DS_Store
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
clk_const.sdc
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
Makefile
1 WARP 2 THREADS WORKING
2019-03-31 05:02:55 -04:00
ram.h
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
results.txt
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
test_bench.cpp
1 WARP 2 THREADS WORKING
2019-03-31 05:02:55 -04:00
test_bench.h
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
Vortex.qpf
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
Vortex.qsf
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
Vortex.v
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_alu.v
Cleanup
2019-03-31 16:30:37 -04:00
VX_context_slave.v
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_context.v
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_csr_handler.v
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
VX_d_e_reg.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
VX_decode.v
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_define.h
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_define.v
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
VX_e_m_reg.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
VX_execute.v
Proper SIMT with fine-grain scheduler implemented
2019-05-10 00:49:54 -07:00
VX_f_d_reg.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
VX_fetch.v
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
VX_forwarding.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
VX_m_w_reg.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
VX_memory.v
Proper SIMT with fine-grain scheduler implemented
2019-05-10 00:49:54 -07:00
VX_register_file_master_slave.v
Proper SIMT with fine-grain scheduler implemented
2019-05-10 00:49:54 -07:00
VX_register_file_slave.v
Proper SIMT with fine-grain scheduler implemented
2019-05-10 00:49:54 -07:00
VX_register_file.v
Proper SIMT with fine-grain scheduler implemented
2019-05-10 00:49:54 -07:00
VX_shared_memory.v
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
VX_warp.v
Sim Work miss
2019-05-18 23:42:55 +04:00
VX_writeback.v
Inefficient context aware desgin
2019-05-08 15:55:06 -07:00
worst_case_paths.rpt
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00