102 lines
3.3 KiB
Systemverilog
102 lines
3.3 KiB
Systemverilog
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`include "VX_platform.vh"
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`TRACING_OFF
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module VX_matrix_arbiter #(
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parameter NUM_REQS = 1,
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parameter LOCK_ENABLE = 0,
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parameter LOG_NUM_REQS = `LOG2UP(NUM_REQS)
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) (
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input wire clk,
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input wire reset,
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input wire [NUM_REQS-1:0] requests,
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output wire [LOG_NUM_REQS-1:0] grant_index,
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output wire [NUM_REQS-1:0] grant_onehot,
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output wire grant_valid,
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input wire grant_unlock
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);
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if (NUM_REQS == 1) begin
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`UNUSED_VAR (clk)
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`UNUSED_VAR (reset)
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`UNUSED_VAR (grant_unlock)
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assign grant_index = '0;
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assign grant_onehot = requests;
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assign grant_valid = requests[0];
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end else begin
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reg [NUM_REQS-1:1] state [NUM_REQS-1:0];
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wire [NUM_REQS-1:0] pri [NUM_REQS-1:0];
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wire [NUM_REQS-1:0] grant_unqual;
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for (genvar i = 0; i < NUM_REQS; ++i) begin
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for (genvar j = 0; j < NUM_REQS; ++j) begin
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if (j > i) begin
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assign pri[j][i] = requests[i] && state[i][j];
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end
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else if (j < i) begin
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assign pri[j][i] = requests[i] && !state[j][i];
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end
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else begin
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assign pri[j][i] = 0;
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end
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end
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assign grant_unqual[i] = requests[i] && !(| pri[i]);
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end
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for (genvar i = 0; i < NUM_REQS; ++i) begin
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for (genvar j = i + 1; j < NUM_REQS; ++j) begin
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always @(posedge clk) begin
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if (reset) begin
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state[i][j] <= '0;
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end else begin
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state[i][j] <= (state[i][j] || grant_unqual[j]) && !grant_unqual[i];
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end
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end
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end
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end
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if (LOCK_ENABLE == 0) begin
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`UNUSED_VAR (grant_unlock)
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assign grant_onehot = grant_unqual;
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end else begin
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reg [NUM_REQS-1:0] grant_unqual_prev;
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always @(posedge clk) begin
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if (reset) begin
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grant_unqual_prev <= '0;
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end else if (grant_unlock) begin
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grant_unqual_prev <= grant_unqual;
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end
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end
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assign grant_onehot = grant_unlock ? grant_unqual : grant_unqual_prev;
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end
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VX_onehot_encoder #(
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.N (NUM_REQS)
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) encoder (
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.data_in (grant_unqual),
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.data_out (grant_index),
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`UNUSED_PIN (valid_out)
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);
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assign grant_valid = (| requests);
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end
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endmodule
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`TRACING_ON
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