105 lines
2.7 KiB
C++
105 lines
2.7 KiB
C++
#include "memsim.h"
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#include <vector>
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#include <queue>
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#include <stdlib.h>
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DISABLE_WARNING_PUSH
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DISABLE_WARNING_UNUSED_PARAMETER
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#define RAMULATOR
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#include <ramulator/src/Gem5Wrapper.h>
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#include <ramulator/src/Request.h>
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#include <ramulator/src/Statistics.h>
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DISABLE_WARNING_POP
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#include "constants.h"
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#include "types.h"
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using namespace vortex;
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class MemSim::Impl {
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private:
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MemSim* simobject_;
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Config config_;
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PerfStats perf_stats_;
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ramulator::Gem5Wrapper* dram_;
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public:
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Impl(MemSim* simobject, const Config& config)
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: simobject_(simobject)
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, config_(config)
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{
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ramulator::Config ram_config;
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ram_config.add("standard", "DDR4");
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ram_config.add("channels", std::to_string(config.channels));
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ram_config.add("ranks", "1");
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ram_config.add("speed", "DDR4_2400R");
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ram_config.add("org", "DDR4_4Gb_x8");
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ram_config.add("mapping", "defaultmapping");
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ram_config.set_core_num(config.num_cores);
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dram_ = new ramulator::Gem5Wrapper(ram_config, MEM_BLOCK_SIZE);
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Stats::statlist.output("ramulator.ddr4.log");
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}
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~Impl() {
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dram_->finish();
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Stats::statlist.printall();
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delete dram_;
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}
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const PerfStats& perf_stats() const {
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return perf_stats_;
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}
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void dram_callback(ramulator::Request& req, uint32_t tag) {
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MemRsp mem_rsp{tag, (uint32_t)req.coreid};
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simobject_->MemRspPort.send(mem_rsp, 1);
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}
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void step(uint64_t /*cycle*/) {
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dram_->tick();
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if (simobject_->MemReqPort.empty())
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return;
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auto& mem_req = simobject_->MemReqPort.front();
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if (mem_req.write) {
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ramulator::Request dram_req(
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mem_req.addr,
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ramulator::Request::Type::WRITE,
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mem_req.core_id
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);
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dram_->send(dram_req);
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++perf_stats_.writes;
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} else {
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ramulator::Request dram_req(
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mem_req.addr,
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ramulator::Request::Type::READ,
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std::bind(&Impl::dram_callback, this, placeholders::_1, mem_req.tag),
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mem_req.core_id
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);
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dram_->send(dram_req);
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++perf_stats_.reads;
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}
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simobject_->MemReqPort.pop();
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}
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};
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///////////////////////////////////////////////////////////////////////////////
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MemSim::MemSim(const SimContext& ctx, const Config& config)
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: SimObject<MemSim>(ctx, "MemSim")
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, MemReqPort(this)
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, MemRspPort(this)
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, impl_(new Impl(this, config))
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{}
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MemSim::~MemSim() {
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delete impl_;
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}
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void MemSim::step(uint64_t cycle) {
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impl_->step(cycle);
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} |