92 lines
2.3 KiB
C++
92 lines
2.3 KiB
C++
#pragma once
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#include <simobject.h>
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#include <bitmanip.h>
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#include <vector>
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#include "types.h"
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namespace vortex {
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class Core;
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class SharedMem : public SimObject<SharedMem> {
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public:
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struct Config {
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uint32_t num_reqs;
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uint32_t num_banks;
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uint32_t bank_offset;
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uint32_t latency;
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bool write_reponse;
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};
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struct PerfStats {
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uint64_t reads;
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uint64_t writes;
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uint64_t bank_stalls;
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PerfStats()
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: reads(0)
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, writes(0)
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, bank_stalls(0)
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{}
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};
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std::vector<SimPort<MemReq>> Inputs;
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std::vector<SimPort<MemRsp>> Outputs;
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SharedMem(const SimContext& ctx, const char* name, const Config& config)
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: SimObject<SharedMem>(ctx, name)
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, Inputs(config.num_reqs, this)
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, Outputs(config.num_reqs, this)
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, config_(config)
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, bank_sel_addr_start_(config.bank_offset)
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, bank_sel_addr_end_(config.bank_offset + log2up(config.num_banks)-1)
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{}
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virtual ~SharedMem() {}
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void step(uint64_t /*cycle*/) {
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std::vector<bool> in_used_banks(config_.num_banks);
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for (uint32_t req_id = 0; req_id < config_.num_reqs; ++req_id) {
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auto& core_req_port = this->Inputs.at(req_id);
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if (core_req_port.empty())
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continue;
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auto& core_req = core_req_port.front();
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uint32_t bank_id = (uint32_t)bit_getw(
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core_req.addr, bank_sel_addr_start_, bank_sel_addr_end_);
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// bank conflict check
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if (in_used_banks.at(bank_id))
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continue;
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in_used_banks.at(bank_id) = true;
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if (!core_req.write || config_.write_reponse) {
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// send response
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MemRsp core_rsp{core_req.tag, core_req.core_id};
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this->Outputs.at(req_id).send(core_rsp, 1);
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}
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// update perf counters
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perf_stats_.reads += !core_req.write;
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perf_stats_.writes += core_req.write;
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// remove input
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core_req_port.pop();
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}
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}
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const PerfStats& perf_stats() const {
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return perf_stats_;
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}
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protected:
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Config config_;
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uint32_t bank_sel_addr_start_;
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uint32_t bank_sel_addr_end_;
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PerfStats perf_stats_;
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};
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} |