c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
135 lines
4.6 KiB
Makefile
135 lines
4.6 KiB
Makefile
XLEN ?= 32
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DESTDIR ?= .
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RTL_DIR = ../../hw/rtl
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DPI_DIR = ../../hw/dpi
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AFU_DIR = $(RTL_DIR)/afu/opae
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SCRIPT_DIR = ../../hw/scripts
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THIRD_PARTY_DIR = ../../third_party
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CXXFLAGS += -std=c++11 -Wall -Wextra -Wfatal-errors -Wno-array-bounds
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CXXFLAGS += -fPIC -Wno-maybe-uninitialized
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CXXFLAGS += -I.. -I../../../hw -I../../common -I$(abspath $(DESTDIR))
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CXXFLAGS += -I../$(THIRD_PARTY_DIR)/softfloat/source/include
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CXXFLAGS += -I../$(THIRD_PARTY_DIR)
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CXXFLAGS += -DXLEN_$(XLEN)
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LDFLAGS += -shared ../$(THIRD_PARTY_DIR)/softfloat/build/Linux-x86_64-GCC/softfloat.a
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LDFLAGS += -L../$(THIRD_PARTY_DIR)/ramulator -lramulator -pthread
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# control RTL debug tracing states
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_PIPELINE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_ICACHE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_DCACHE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_MEM
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_BANK
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA
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DBG_TRACE_FLAGS += -DDBG_TRACE_AFU
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DBG_TRACE_FLAGS += -DDBG_TRACE_SCOPE
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DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR
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# Control logic analyzer monitors
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DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU
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DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE
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DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH
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DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU
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DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED
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# AFU parameters
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CONFIGS += -DPLATFORM_PROVIDES_LOCAL_MEMORY
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ifeq (,$(findstring PLATFORM_PARAM_LOCAL_MEMORY_BANKS,$(CONFIGS)))
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CONFIGS += -DPLATFORM_PARAM_LOCAL_MEMORY_BANKS=2
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endif
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ifeq (,$(findstring PLATFORM_PARAM_LOCAL_MEMORY_ADDR_WIDTH,$(CONFIGS)))
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CONFIGS += -DPLATFORM_PARAM_LOCAL_MEMORY_ADDR_WIDTH=26
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endif
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ifeq (,$(findstring PLATFORM_PARAM_LOCAL_MEMORY_DATA_WIDTH,$(CONFIGS)))
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CONFIGS += -DPLATFORM_PARAM_LOCAL_MEMORY_DATA_WIDTH=512
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endif
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ifeq (,$(findstring PLATFORM_PARAM_LOCAL_MEMORY_BURST_CNT_WIDTH,$(CONFIGS)))
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CONFIGS += -DPLATFORM_PARAM_LOCAL_MEMORY_BURST_CNT_WIDTH=4
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endif
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DBG_FLAGS += -DDEBUG_LEVEL=$(DEBUG) -DVCD_OUTPUT $(DBG_TRACE_FLAGS)
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SRCS = ../common/util.cpp ../common/mem.cpp ../common/rvfloats.cpp
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SRCS += $(DPI_DIR)/util_dpi.cpp $(DPI_DIR)/float_dpi.cpp
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SRCS += fpga.cpp opae_sim.cpp
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RTL_PKGS = $(AFU_DIR)/local_mem_cfg_pkg.sv $(AFU_DIR)/ccip/ccip_if_pkg.sv
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RTL_PKGS += $(RTL_DIR)/VX_gpu_pkg.sv $(RTL_DIR)/fpu/VX_fpu_pkg.sv
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FPU_INCLUDE = -I$(RTL_DIR)/fpu
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ifneq (,$(findstring FPU_FPNEW,$(CONFIGS)))
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RTL_PKGS += $(THIRD_PARTY_DIR)/fpnew/src/fpnew_pkg.sv $(THIRD_PARTY_DIR)/fpnew/src/common_cells/src/cf_math_pkg $(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
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FPU_INCLUDE += -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src
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endif
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RTL_INCLUDE = -I$(RTL_DIR) -I$(DPI_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/core -I$(RTL_DIR)/mem -I$(RTL_DIR)/cache $(FPU_INCLUDE)
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RTL_INCLUDE += -I$(AFU_DIR) -I$(AFU_DIR)/ccip
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TOP = vortex_afu_shim
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VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic
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VL_FLAGS += -Wno-DECLFILENAME -Wno-REDEFMACRO
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VL_FLAGS += --x-initial unique --x-assign unique
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VL_FLAGS += -DSIMULATION
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VL_FLAGS += -DXLEN_$(XLEN)
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VL_FLAGS += $(CONFIGS)
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VL_FLAGS += verilator.vlt
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VL_FLAGS += $(RTL_INCLUDE)
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VL_FLAGS += $(RTL_PKGS)
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VL_FLAGS += $(DBG_SCOPE_FLAGS)
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CXXFLAGS += $(CONFIGS)
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# Enable Verilator multithreaded simulation
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THREADS ?= $(shell python -c 'import multiprocessing as mp; print(mp.cpu_count())')
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VL_FLAGS += -j $(THREADS)
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#VL_FLAGS += --threads $(THREADS)
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# Debugigng
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ifdef DEBUG
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VL_FLAGS += --trace --trace-structs $(DBG_FLAGS)
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CXXFLAGS += -g -O0 $(DBG_FLAGS)
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else
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VL_FLAGS += -DNDEBUG
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CXXFLAGS += -O3 -DNDEBUG
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endif
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# Enable scope analyzer
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ifdef SCOPE
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VL_FLAGS += -DSCOPE
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CXXFLAGS += -DSCOPE
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SCOPE_JSON = $(DESTDIR)/scope.json
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endif
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# Enable perf counters
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ifdef PERF
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VL_FLAGS += -DPERF_ENABLE
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CXXFLAGS += -DPERF_ENABLE
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endif
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# use our OPAE shim
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VL_FLAGS += -DNOPAE
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CXXFLAGS += -DNOPAE
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PROJECT = libopae-c-sim.so
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all: $(DESTDIR)/$(PROJECT)
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$(DESTDIR)/vortex.xml:
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verilator --xml-only -O0 $(VL_FLAGS) $(TOP) --xml-output $(DESTDIR)/vortex.xml
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$(DESTDIR)/scope.json: $(DESTDIR)/vortex.xml
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$(SCRIPT_DIR)/scope.py $(DESTDIR)/vortex.xml -o $(DESTDIR)/scope.json
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$(DESTDIR)/vortex_afu.h : $(AFU_DIR)/vortex_afu.vh
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$(SCRIPT_DIR)/gen_config.py -i $(AFU_DIR)/vortex_afu.vh -o $(DESTDIR)/vortex_afu.h
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$(DESTDIR)/$(PROJECT): $(SRCS) $(DESTDIR)/vortex_afu.h $(SCOPE_JSON)
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verilator --build --exe -O3 $(VL_FLAGS) --cc $(TOP) --top-module $(TOP) $(SRCS) -CFLAGS '$(CXXFLAGS)' -LDFLAGS '$(LDFLAGS)' -o ../$(DESTDIR)/$(PROJECT)
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clean:
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rm -rf obj_dir $(DESTDIR)/vortex.xml $(DESTDIR)/scope.json $(DESTDIR)/vortex_afu.h $(DESTDIR)/$(PROJECT)
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