c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
98 lines
3.2 KiB
Makefile
98 lines
3.2 KiB
Makefile
XLEN ?= 32
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DESTDIR ?= .
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RTL_DIR = ../../hw/rtl
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DPI_DIR = ../../hw/dpi
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THIRD_PARTY_DIR = ../../third_party
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CXXFLAGS += -std=c++11 -Wall -Wextra -Wfatal-errors -Wno-array-bounds
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CXXFLAGS += -fPIC -Wno-maybe-uninitialized
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CXXFLAGS += -I../../../hw -I../../common
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CXXFLAGS += -I../$(THIRD_PARTY_DIR)/softfloat/source/include
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CXXFLAGS += -I../$(THIRD_PARTY_DIR)
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CXXFLAGS += -DXLEN_$(XLEN)
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LDFLAGS += ../$(THIRD_PARTY_DIR)/softfloat/build/Linux-x86_64-GCC/softfloat.a
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LDFLAGS += -L../$(THIRD_PARTY_DIR)/ramulator -lramulator
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# control RTL debug tracing states
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_PIPELINE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_ICACHE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_DCACHE
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DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_MEM
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_BANK
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG
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DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA
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DBG_TRACE_FLAGS += -DDBG_TRACE_AFU
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DBG_TRACE_FLAGS += -DDBG_TRACE_SCOPE
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DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR
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DBG_FLAGS += -DDEBUG_LEVEL=$(DEBUG) -DVCD_OUTPUT $(DBG_TRACE_FLAGS)
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RTL_PKGS = $(RTL_DIR)/VX_gpu_pkg.sv $(RTL_DIR)/fpu/VX_fpu_pkg.sv
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FPU_INCLUDE = -I$(RTL_DIR)/fpu
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ifneq (,$(findstring FPU_FPNEW,$(CONFIGS)))
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RTL_PKGS += $(THIRD_PARTY_DIR)/fpnew/src/fpnew_pkg.sv $(THIRD_PARTY_DIR)/fpnew/src/common_cells/src/cf_math_pkg $(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
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FPU_INCLUDE += -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src
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endif
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RTL_INCLUDE = -I$(RTL_DIR) -I$(DPI_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/core -I$(RTL_DIR)/mem -I$(RTL_DIR)/cache $(FPU_INCLUDE)
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SRCS = ../common/util.cpp ../common/mem.cpp ../common/rvfloats.cpp
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SRCS += $(DPI_DIR)/util_dpi.cpp $(DPI_DIR)/float_dpi.cpp
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SRCS += processor.cpp
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ifdef AXI_BUS
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TOP = Vortex_axi
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CXXFLAGS += -DAXI_BUS
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else
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TOP = Vortex
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endif
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VL_FLAGS = --exe
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VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic
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VL_FLAGS += -Wno-DECLFILENAME -Wno-REDEFMACRO
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VL_FLAGS += --x-initial unique --x-assign unique
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VL_FLAGS += verilator.vlt
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VL_FLAGS += -DSIMULATION
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VL_FLAGS += -DXLEN_$(XLEN)
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VL_FLAGS += $(CONFIGS)
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VL_FLAGS += $(RTL_INCLUDE)
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VL_FLAGS += $(RTL_PKGS)
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VL_FLAGS += --cc $(TOP) --top-module $(TOP)
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CXXFLAGS += $(CONFIGS)
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# Enable Verilator multithreaded simulation
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THREADS ?= $(shell python -c 'import multiprocessing as mp; print(mp.cpu_count())')
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VL_FLAGS += -j $(THREADS)
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#VL_FLAGS += --threads $(THREADS)
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# Debugigng
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ifdef DEBUG
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VL_FLAGS += --trace --trace-structs $(DBG_FLAGS)
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CXXFLAGS += -g -O0 $(DBG_FLAGS)
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else
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VL_FLAGS += -DNDEBUG
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CXXFLAGS += -O2 -DNDEBUG
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endif
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# Enable perf counters
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ifdef PERF
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VL_FLAGS += -DPERF_ENABLE
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CXXFLAGS += -DPERF_ENABLE
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endif
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PROJECT = rtlsim
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all: $(DESTDIR)/$(PROJECT)
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$(DESTDIR)/$(PROJECT): $(SRCS) main.cpp
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verilator --build $(VL_FLAGS) $^ -CFLAGS '$(CXXFLAGS) -DSTARTUP_ADDR=0x80000000' -LDFLAGS '$(LDFLAGS)' -o ../$@
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$(DESTDIR)/lib$(PROJECT).so: $(SRCS)
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verilator --build $(VL_FLAGS) $^ -CFLAGS '$(CXXFLAGS)' -LDFLAGS '-shared $(LDFLAGS)' -o ../$@
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clean:
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rm -rf obj_dir $(DESTDIR)/$(PROJECT) $(DESTDIR)/lib$(PROJECT).so
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