335 lines
11 KiB
Verilog
335 lines
11 KiB
Verilog
`include "VX_define.vh"
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module VX_warp_sched (
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input wire clk, // Clock
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input wire reset,
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input wire stall,
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// Wspawn
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input wire wspawn,
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input wire[31:0] wsapwn_pc,
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input wire[`NUM_WARPS-1:0] wspawn_new_active,
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// CTM
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input wire ctm,
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input wire[`NUM_THREADS-1:0] ctm_mask,
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input wire[`NW_BITS-1:0] ctm_warp_num,
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// WHALT
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input wire whalt,
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input wire[`NW_BITS-1:0] whalt_warp_num,
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input wire is_barrier,
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`DEBUG_BEGIN
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input wire[31:0] barrier_id,
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`DEBUG_END
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input wire[$clog2(`NUM_WARPS):0] num_warps,
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input wire[`NW_BITS-1:0] barrier_warp_num,
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// WSTALL
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input wire wstall,
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input wire[`NW_BITS-1:0] wstall_warp_num,
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// Split
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input wire is_split,
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input wire dont_split,
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input wire[`NUM_THREADS-1:0] split_new_mask,
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input wire[`NUM_THREADS-1:0] split_later_mask,
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input wire[31:0] split_save_pc,
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input wire[`NW_BITS-1:0] split_warp_num,
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// Join
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input wire is_join,
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input wire[`NW_BITS-1:0] join_warp_num,
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// JAL
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input wire jal,
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input wire[31:0] jal_dest,
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input wire[`NW_BITS-1:0] jal_warp_num,
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// Branch
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input wire branch_valid,
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input wire branch_dir,
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input wire[31:0] branch_dest,
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input wire[`NW_BITS-1:0] branch_warp_num,
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output wire[`NUM_THREADS-1:0] thread_mask,
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output wire[`NW_BITS-1:0] warp_num,
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output wire[31:0] warp_pc,
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output wire ebreak,
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output wire scheduled_warp,
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input wire[`NW_BITS-1:0] icache_stage_wid,
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input wire[`NUM_THREADS-1:0] icache_stage_valids
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);
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wire update_use_wspawn;
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wire update_visible_active;
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wire[(1+32+`NUM_THREADS-1):0] d[`NUM_WARPS-1:0];
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wire join_fall;
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wire[31:0] join_pc;
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wire[`NUM_THREADS-1:0] join_tm;
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`DEBUG_BEGIN
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wire in_wspawn = wspawn;
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wire in_ctm = ctm;
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wire in_whalt = whalt;
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wire in_wstall = wstall;
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`DEBUG_END
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reg[`NUM_WARPS-1:0] warp_active;
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reg[`NUM_WARPS-1:0] warp_stalled;
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reg [`NUM_WARPS-1:0] visible_active;
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wire[`NUM_WARPS-1:0] use_active;
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reg [`NUM_WARPS-1:0] warp_lock;
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wire wstall_this_cycle;
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reg [`NUM_THREADS-1:0] thread_masks[`NUM_WARPS-1:0];
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reg [31:0] warp_pcs[`NUM_WARPS-1:0];
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// barriers
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reg [`NUM_WARPS-1:0] barrier_stall_mask[(`NUM_BARRIERS-1):0];
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wire reached_barrier_limit;
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wire [`NUM_WARPS-1:0] b_mask;
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wire [$clog2(`NUM_WARPS):0] b_count;
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// wsapwn
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reg [31:0] use_wsapwn_pc;
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reg [`NUM_WARPS-1:0] use_wsapwn;
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wire [`NW_BITS-1:0] warp_to_schedule;
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wire schedule;
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wire hazard;
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wire global_stall;
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wire real_schedule;
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wire [31:0] new_pc;
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reg [`NUM_WARPS-1:0] total_barrier_stall;
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reg didnt_split;
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integer w, b;
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always @(posedge clk) begin
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if (reset) begin
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for (b = 0; b < `NUM_BARRIERS; b=b+1) begin
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barrier_stall_mask[b] <= 0;
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end
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use_wsapwn_pc <= 0;
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use_wsapwn <= 0;
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warp_pcs[0] <= `STARTUP_ADDR;
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warp_active[0] <= 1; // Activating first warp
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visible_active[0] <= 1; // Activating first warp
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thread_masks[0] <= 1; // Activating first thread in first warp
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warp_stalled <= 0;
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didnt_split <= 0;
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warp_lock <= 0;
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// total_barrier_stall = 0;
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for (w = 1; w < `NUM_WARPS; w=w+1) begin
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warp_pcs[w] <= 0;
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warp_active[w] <= 0; // Activating first warp
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visible_active[w] <= 0; // Activating first warp
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thread_masks[w] <= 1; // Activating first thread in first warp
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end
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end else begin
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// Wsapwning warps
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if (wspawn) begin
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warp_active <= wspawn_new_active;
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use_wsapwn_pc <= wsapwn_pc;
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use_wsapwn <= wspawn_new_active & (~`NUM_WARPS'b1);
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end
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if (is_barrier) begin
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warp_stalled[barrier_warp_num] <= 0;
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if (reached_barrier_limit) begin
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barrier_stall_mask[barrier_id] <= 0;
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end else begin
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barrier_stall_mask[barrier_id][barrier_warp_num] <= 1;
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end
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end else if (ctm) begin
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thread_masks[ctm_warp_num] <= ctm_mask;
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warp_stalled[ctm_warp_num] <= 0;
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end else if (is_join && !didnt_split) begin
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if (!join_fall) begin
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warp_pcs[join_warp_num] <= join_pc;
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end
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thread_masks[join_warp_num] <= join_tm;
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didnt_split <= 0;
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end else if (is_split) begin
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warp_stalled[split_warp_num] <= 0;
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if (!dont_split) begin
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thread_masks[split_warp_num] <= split_new_mask;
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didnt_split <= 0;
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end else begin
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didnt_split <= 1;
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end
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end
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if (whalt) begin
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warp_active[whalt_warp_num] <= 0;
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visible_active[whalt_warp_num] <= 0;
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end
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if (update_use_wspawn) begin
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use_wsapwn[warp_to_schedule] <= 0;
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thread_masks[warp_to_schedule] <= 1;
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end
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// Stalling the scheduling of warps
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if (wstall) begin
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warp_stalled[wstall_warp_num] <= 1;
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visible_active[wstall_warp_num] <= 0;
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end
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// Refilling active warps
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if (update_visible_active) begin
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visible_active <= warp_active & (~warp_stalled) & (~total_barrier_stall) & ~warp_lock;
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end
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// Don't change state if stall
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if (!global_stall && real_schedule && (thread_mask != 0)) begin
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visible_active[warp_to_schedule] <= 0;
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warp_pcs[warp_to_schedule] <= new_pc;
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end
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// Jal
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if (jal) begin
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warp_pcs[jal_warp_num] <= jal_dest;
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warp_stalled[jal_warp_num] <= 0;
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end
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// Branch
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if (branch_valid) begin
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if (branch_dir) warp_pcs[branch_warp_num] <= branch_dest;
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warp_stalled[branch_warp_num] <= 0;
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end
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// Lock/Release
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if (scheduled_warp && !stall) begin
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warp_lock[warp_num] <= 1'b1;
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// warp_lock <= {`NUM_WARPS{1'b1}};
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end
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if (|icache_stage_valids && !stall) begin
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warp_lock[icache_stage_wid] <= 1'b0;
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// warp_lock <= {`NUM_WARPS{1'b0}};
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end
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end
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end
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VX_countones #(
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.N(`NUM_WARPS)
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) barrier_count (
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.valids(b_mask),
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.count (b_count)
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);
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wire [$clog2(`NUM_WARPS):0] count_visible_active;
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VX_countones #(
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.N(`NUM_WARPS)
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) num_visible (
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.valids(visible_active),
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.count (count_visible_active)
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);
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// assign b_count = $countones(b_mask);
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assign b_mask = barrier_stall_mask[barrier_id][`NUM_WARPS-1:0];
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assign reached_barrier_limit = b_count == (num_warps);
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assign wstall_this_cycle = wstall && (wstall_warp_num == warp_to_schedule); // Maybe bug
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assign total_barrier_stall = barrier_stall_mask[0] | barrier_stall_mask[1] | barrier_stall_mask[2] | barrier_stall_mask[3];
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// integer curr_b;
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// always @(*) begin
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// total_barrier_stall = 0;
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// for (curr_b = 0; curr_b < `NUM_BARRIERS; curr_b=curr_b+1)
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// begin
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// total_barrier_stall[`NUM_WARPS-1:0] = total_barrier_stall[`NUM_WARPS-1:0] | barrier_stall_mask[curr_b];
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// end
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// end
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assign update_visible_active = (count_visible_active < 1) && !(stall || wstall_this_cycle || hazard || is_join);
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wire [(1+32+`NUM_THREADS-1):0] q1 = {1'b1, 32'b0, thread_masks[split_warp_num]};
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wire [(1+32+`NUM_THREADS-1):0] q2 = {1'b0, split_save_pc, split_later_mask};
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assign {join_fall, join_pc, join_tm} = d[join_warp_num];
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genvar curr_warp;
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generate
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for (curr_warp = 0; curr_warp < `NUM_WARPS; curr_warp = curr_warp + 1) begin : stacks
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wire correct_warp_s = (curr_warp == split_warp_num);
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wire correct_warp_j = (curr_warp == join_warp_num);
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wire push = (is_split && !dont_split) && correct_warp_s;
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wire pop = is_join && correct_warp_j;
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VX_generic_stack #(
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.WIDTH(1+32+`NUM_THREADS),
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.DEPTH($clog2(`NUM_THREADS)+1)
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) ipdom_stack(
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.clk (clk),
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.reset(reset),
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.push (push),
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.pop (pop),
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.d (d[curr_warp]),
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.q1 (q1),
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.q2 (q2)
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);
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end
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endgenerate
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// wire should_stall = stall || (jal && (warp_to_schedule == jal_warp_num)) || (branch_dir && (warp_to_schedule == branch_warp_num));
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wire should_jal = (jal && (warp_to_schedule == jal_warp_num));
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wire should_bra = (branch_dir && (warp_to_schedule == branch_warp_num));
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assign hazard = (should_jal || should_bra) && schedule;
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assign real_schedule = schedule && !warp_stalled[warp_to_schedule] && !total_barrier_stall[warp_to_schedule] && !warp_lock[0];
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assign global_stall = (stall || wstall_this_cycle || hazard || !real_schedule || is_join);
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assign scheduled_warp = !(wstall_this_cycle || hazard || !real_schedule || is_join) && !reset;
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wire real_use_wspawn = use_wsapwn[warp_to_schedule];
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assign warp_pc = real_use_wspawn ? use_wsapwn_pc : warp_pcs[warp_to_schedule];
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assign thread_mask = (global_stall) ? 0 : (real_use_wspawn ? `NUM_THREADS'b1 : thread_masks[warp_to_schedule]);
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assign warp_num = warp_to_schedule;
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assign update_use_wspawn = use_wsapwn[warp_to_schedule] && !global_stall;
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assign new_pc = warp_pc + 4;
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assign use_active = (count_visible_active < 1) ? (warp_active & (~warp_stalled) & (~total_barrier_stall) & (~warp_lock)) : visible_active;
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// Choosing a warp to schedule
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VX_priority_encoder #(
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.N(`NUM_WARPS)
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) choose_schedule (
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.valids (use_active),
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.index (warp_to_schedule),
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.found (schedule)
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);
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// always @(*) begin
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// $display("WarpPC: %h",warp_pc);
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// $display("real_schedule: %d, schedule: %d, warp_stalled: %d, warp_to_schedule: %d, total_barrier_stall: %d",real_schedule, schedule, warp_stalled[warp_to_schedule], warp_to_schedule, total_barrier_stall[warp_to_schedule]);
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// end
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assign ebreak = (warp_active == 0);
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endmodule |