221 lines
8.1 KiB
JSON
221 lines
8.1 KiB
JSON
{
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"version": 1,
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"includes":[
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"../rtl/VX_config.vh",
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"../rtl/VX_platform.vh",
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"../rtl/VX_define.vh",
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"../rtl/cache/VX_cache_config.vh"
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],
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"modules": {
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"afu": {
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"submodules": {
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"vortex": {"type":"Vortex", "enabled":true}
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}
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},
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"Vortex": {
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"submodules": {
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"cluster": {"type":"VX_cluster", "count":"`NUM_CLUSTERS"},
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"l3cache": {"type":"VX_cache", "enabled":"`L3_ENABLE", "params":{"NUM_BANKS":"`L3NUM_BANKS"}}
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}
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},
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"VX_cluster": {
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"submodules": {
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"core": {"type":"VX_core", "count":"`NUM_CORES", "enabled":true},
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"l2cache": {"type":"VX_cache", "enabled":"`L2_ENABLE", "params":{"NUM_BANKS":"`L2NUM_BANKS"}}
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}
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},
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"VX_core": {
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"submodules": {
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"pipeline": {"type":"VX_pipeline", "enabled":true},
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"mem_unit": {"type":"VX_mem_unit", "enabled":true}
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}
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},
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"VX_pipeline": {
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"submodules": {
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"fetch": {"type":"VX_fetch", "enabled":true},
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"decode": {"type":"VX_decode", "enabled":true},
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"issue": {"type":"VX_issue", "enabled":true},
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"execute": {"type":"VX_execute", "enabled":true},
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"commit": {"type":"VX_commit", "enabled":true}
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}
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},
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"VX_fetch": {
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"submodules": {
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"warp_sched": {"type":"VX_warp_sched"},
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"icache_stage": {"type":"VX_icache_stage"}
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}
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},
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"VX_warp_sched": {},
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"VX_icache_stage": {},
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"VX_decode": {},
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"VX_issue": {},
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"VX_execute": {
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"submodules": {
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"lsu_unit": {"type":"VX_lsu_unit"},
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"gpu_unit": {"type":"VX_gpu_unit"}
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}
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},
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"VX_commit": {},
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"VX_lsu_unit": {},
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"VX_gpu_unit": {},
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"VX_mem_unit": {
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"submodules": {
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"smem": {"type":"VX_cache", "enabled":"`SM_ENABLE", "params":{"NUM_BANKS":"`SNUM_BANKS"}},
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"dcache": {"type":"VX_cache", "params":{"NUM_BANKS":"`DNUM_BANKS"}},
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"icache": {"type":"VX_cache", "params":{"NUM_BANKS":"`INUM_BANKS"}}
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}
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},
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"VX_cache": {
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"submodules": {
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"bank": {"type":"VX_bank", "count":"NUM_BANKS"}
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}
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},
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"VX_bank": {}
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},
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"taps": {
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"afu": {
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"!cmd_type":3,
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"!state":3,
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"?cci_sRxPort_c0_mmioRdValid":1,
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"?cci_sRxPort_c0_mmioWrValid":1,
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"mmio_hdr_address":16,
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"mmio_hdr_length":2,
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"cci_sRxPort_c0_hdr_mdata":16,
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"?cci_sRxPort_c0_rspValid":1,
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"?cci_sRxPort_c1_rspValid":1,
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"?cci_sTxPort_c0_valid":1,
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"cci_sTxPort_c0_hdr_address":42,
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"cci_sTxPort_c0_hdr_mdata":16,
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"?cci_sTxPort_c1_valid":1,
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"cci_sTxPort_c1_hdr_address":42,
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"cci_sTxPort_c2_mmioRdValid":1,
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"!cci_sRxPort_c0TxAlmFull":1,
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"!cci_sRxPort_c1TxAlmFull":1,
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"avs_address":26,
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"!avs_waitrequest":1,
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"?avs_write_fire":1,
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"?avs_read_fire":1,
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"avs_byteenable":64,
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"avs_burstcount":4,
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"avs_readdatavalid":1,
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"mem_bank_select":1,
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"cci_dram_rd_req_ctr":26,
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"cci_dram_wr_req_ctr":26,
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"cci_rd_req_ctr":26,
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"cci_rd_rsp_ctr":3,
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"cci_wr_req_ctr":26,
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"?cci_wr_req_fire":1,
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"?cci_wr_rsp_fire":1,
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"?cci_rd_req_fire":1,
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"?cci_rd_rsp_fire":1,
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"!cci_pending_reads_full":1,
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"!cci_pending_writes_empty":1,
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"!cci_pending_writes_full": 1,
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"?afu_dram_req_fire": 1,
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"afu_dram_req_addr": 26,
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"afu_dram_req_tag": 28,
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"?afu_dram_rsp_fire": 1,
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"afu_dram_rsp_tag": 28
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},
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"afu/vortex": {
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"!reset": 1,
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"?dram_req_fire": 1,
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"dram_req_addr": 32,
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"dram_req_rw": 1,
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"dram_req_byteen":"`VX_DRAM_BYTEEN_WIDTH",
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"dram_req_data":"`VX_DRAM_LINE_WIDTH",
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"dram_req_tag":"`VX_DRAM_TAG_WIDTH",
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"?dram_rsp_fire": 1,
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"dram_rsp_data":"`VX_DRAM_LINE_WIDTH",
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"dram_rsp_tag":"`VX_DRAM_TAG_WIDTH",
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"busy": 1
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},
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"afu/vortex/cluster/core/pipeline/fetch/icache_stage": {
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"?icache_req_fire": 1,
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"icache_req_wid":"`NW_BITS",
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"icache_req_addr": 32,
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"icache_req_tag":"`ICORE_TAG_ID_BITS",
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"?icache_rsp_fire": 1,
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"icache_rsp_data": 32,
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"icache_rsp_tag":"`ICORE_TAG_ID_BITS"
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},
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"afu/vortex/cluster/core/pipeline/fetch/warp_sched": {
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"?wsched_scheduled_warp": 1,
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"wsched_active_warps": "`NUM_WARPS",
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"wsched_schedule_table": "`NUM_WARPS",
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"wsched_schedule_ready": "`NUM_WARPS",
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"wsched_warp_to_schedule": "`NW_BITS",
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"wsched_warp_pc": "32"
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},
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"afu/vortex/cluster/core/pipeline/execute/gpu_unit": {
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"?gpu_req_fire": 1,
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"gpu_req_wid": "`NW_BITS",
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"gpu_req_tmask": "`NUM_THREADS",
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"gpu_req_op_type": "`GPU_BITS",
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"gpu_req_rs1": "32",
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"gpu_req_rs2": "32",
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"?gpu_rsp_valid": 1,
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"gpu_rsp_wid": "`NW_BITS",
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"gpu_rsp_tmc": "`GPU_TMC_SIZE",
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"gpu_rsp_wspawn": "`GPU_WSPAWN_SIZE",
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"gpu_rsp_split": "`GPU_SPLIT_SIZE",
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"gpu_rsp_barrier": "`GPU_BARRIER_SIZE"
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},
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"afu/vortex/cluster/core/pipeline/execute/lsu_unit": {
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"?dcache_req_fire":"`NUM_THREADS",
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"dcache_req_wid":"`NW_BITS",
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"dcache_req_pc": 32,
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"dcache_req_addr":"`NUM_THREADS * 32",
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"dcache_req_rw": 1,
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"dcache_req_byteen":"`NUM_THREADS * 4",
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"dcache_req_data": "`NUM_THREADS * 32",
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"dcache_req_tag":"`DCORE_TAG_ID_BITS",
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"?dcache_rsp_fire":"`NUM_THREADS",
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"dcache_rsp_data":"`NUM_THREADS * 32",
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"dcache_rsp_tag":"`DCORE_TAG_ID_BITS"
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},
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"afu/vortex/cluster/core/pipeline/issue": {
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"?issue_fire": 1,
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"issue_wid":"`NW_BITS",
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"issue_tmask":"`NUM_THREADS",
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"issue_pc": 32,
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"issue_ex_type":"`EX_BITS",
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"issue_op_type":"`OP_BITS",
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"issue_op_mod":"`MOD_BITS",
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"issue_wb": 1,
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"issue_rd":"`NR_BITS",
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"issue_rs1":"`NR_BITS",
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"issue_rs2":"`NR_BITS",
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"issue_rs3":"`NR_BITS",
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"issue_imm": 32,
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"issue_rs1_is_pc": 1,
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"issue_rs2_is_imm": 1,
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"gpr_rsp_a":"`NUM_THREADS * 32",
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"gpr_rsp_b":"`NUM_THREADS * 32",
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"gpr_rsp_c":"`NUM_THREADS * 32",
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"?writeback_valid": 1,
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"writeback_wid":"`NW_BITS",
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"writeback_pc": 32,
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"writeback_tmask":"`NUM_THREADS",
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"writeback_rd":"`NR_BITS",
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"writeback_data":"`NUM_THREADS * 32",
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"writeback_eop": 1,
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"!scoreboard_delay": 1,
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"!execute_delay": 1
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},
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"afu/vortex/l3cache/bank, afu/vortex/cluster/l2cache/bank, afu/vortex/cluster/core/mem_unit/dcache/bank, afu/vortex/cluster/core/mem_unit/icache/bank, afu/vortex/cluster/core/mem_unit/smem/bank": {
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"?valid_st0": 1,
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"?valid_st1": 1,
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"addr_st0": 32,
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"addr_st1": 32,
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"is_fill_st0": 1,
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"is_mshr_st0": 1,
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"miss_st0": 1,
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"force_miss_st0": 1,
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"dirty_st0": 1,
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"mshr_push": 1,
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"?pipeline_stall": 1
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}
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}
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}
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