Save Z4C CUDA optimization progress
This commit is contained in:
@@ -335,7 +335,7 @@ bool cuda_can_direct_pack(const Parallel::gridseg *src, const Parallel::gridseg
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if (z4c_amr_device < 0)
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{
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const char *env = getenv("AMSS_CUDA_Z4C_AMR_DEVICE");
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z4c_amr_device = (env && atoi(env) != 0) ? 1 : 0;
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z4c_amr_device = (!env || atoi(env) != 0) ? 1 : 0;
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}
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if (!z4c_amr_device)
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return false;
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@@ -228,7 +228,13 @@ bool z4c_cuda_keep_resident_after_step(int lev, int trfls_in, int analysis_lev)
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if (enabled < 0)
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{
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const char *env = getenv("AMSS_CUDA_Z4C_KEEP_RESIDENT_AFTER_STEP");
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enabled = (env && atoi(env) != 0) ? 1 : 0;
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if (env)
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enabled = (atoi(env) != 0) ? 1 : 0;
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else
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{
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env = getenv("AMSS_CUDA_KEEP_RESIDENT_AFTER_STEP");
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enabled = (env && atoi(env) != 0) ? 1 : 0;
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}
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}
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if (!enabled)
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return false;
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@@ -478,6 +484,89 @@ bool z4c_cuda_compute_porg_rhs_resident(cgh *GH,
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return true;
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}
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bool z4c_cuda_download_bh_shift_level(MyList<Patch> *PatL,
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int myrank,
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var *forx, var *fory, var *forz)
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{
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MyList<Patch> *Pp = PatL;
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while (Pp)
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{
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MyList<Block> *BP = Pp->data->blb;
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while (BP)
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{
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Block *cg = BP->data;
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if (myrank == cg->rank && z4c_cuda_has_resident_state(cg))
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{
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double *fields[3] = {
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cg->fgfs[forx->sgfn],
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cg->fgfs[fory->sgfn],
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cg->fgfs[forz->sgfn]};
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if (z4c_cuda_download_state_subset(cg, cg->shape, 3,
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k_z4c_cuda_bh_state_indices,
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fields))
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return false;
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}
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if (BP == Pp->data->ble)
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break;
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BP = BP->next;
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}
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Pp = Pp->next;
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}
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return true;
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}
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bool z4c_cuda_refresh_constraint_level(MyList<Patch> *PatL,
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int myrank,
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var *Cons_Ham, var *Cons_Px,
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var *Cons_Py, var *Cons_Pz,
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var *Cons_Gx, var *Cons_Gy,
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var *Cons_Gz, var *TZ0,
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int Symmetry, int lev, double eps)
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{
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bool all_resident = true;
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const int tz_index = 24;
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MyList<Patch> *Pp = PatL;
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while (Pp)
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{
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MyList<Block> *BP = Pp->data->blb;
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while (BP)
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{
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Block *cg = BP->data;
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if (myrank == cg->rank)
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{
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if (!z4c_cuda_has_resident_state(cg))
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{
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all_resident = false;
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}
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else
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{
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double *constraints[7] = {
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cg->fgfs[Cons_Ham->sgfn], cg->fgfs[Cons_Px->sgfn],
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cg->fgfs[Cons_Py->sgfn], cg->fgfs[Cons_Pz->sgfn],
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cg->fgfs[Cons_Gx->sgfn], cg->fgfs[Cons_Gy->sgfn],
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cg->fgfs[Cons_Gz->sgfn]};
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double *tz_out[1] = {cg->fgfs[TZ0->sgfn]};
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int co = 0;
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if (z4c_cuda_compute_constraints_resident(cg, cg->shape,
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cg->X[0], cg->X[1], cg->X[2],
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Symmetry, eps, co,
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constraints) ||
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z4c_cuda_download_state_subset(cg, cg->shape, 1, &tz_index, tz_out))
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{
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cout << "CUDA Z4C resident constraint refresh failed" << endl;
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MPI_Abort(MPI_COMM_WORLD, 1);
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}
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}
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}
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if (BP == Pp->data->ble)
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break;
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BP = BP->next;
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}
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Pp = Pp->next;
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}
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return all_resident;
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}
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} // namespace
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#endif
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@@ -496,6 +585,33 @@ void Z4c_class::Step(int lev, int YN)
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int iter_count = 0;
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int pre = 0, cor = 1;
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int ERROR = 0;
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const double dT_mon = dT * pow(0.5, Mymax(0, trfls));
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const bool need_constraint_after_step = (LastConsOut + dT_mon >= AnasTime);
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if (BH_num > 0 && lev == GH->levels - 1)
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{
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if (!z4c_cuda_download_bh_shift_level(GH->PatL[lev], myrank, Sfx0, Sfy0, Sfz0))
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{
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if (myrank == 0 && ErrorMonitor->outfile)
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ErrorMonitor->outfile << "CUDA Z4C failed to download predictor black-hole shift at t = "
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<< PhysTime << endl;
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MPI_Abort(MPI_COMM_WORLD, 1);
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}
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compute_Porg_rhs(Porg0, Porg_rhs, Sfx0, Sfy0, Sfz0, lev);
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for (int ithBH = 0; ithBH < BH_num; ithBH++)
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{
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][0], Porg[ithBH][0], Porg_rhs[ithBH][0], iter_count);
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][1], Porg[ithBH][1], Porg_rhs[ithBH][1], iter_count);
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][2], Porg[ithBH][2], Porg_rhs[ithBH][2], iter_count);
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if (Symmetry > 0)
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Porg[ithBH][2] = fabs(Porg[ithBH][2]);
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if (Symmetry == 2)
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{
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Porg[ithBH][0] = fabs(Porg[ithBH][0]);
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Porg[ithBH][1] = fabs(Porg[ithBH][1]);
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}
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}
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}
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MyList<Patch> *Pp = GH->PatL[lev];
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while (Pp)
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@@ -565,24 +681,6 @@ void Z4c_class::Step(int lev, int YN)
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Parallel::Sync_cached(GH->PatL[lev], SynchList_pre, Symmetry, sync_cache_pre[lev]);
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if (BH_num > 0 && lev == GH->levels - 1)
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{
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compute_Porg_rhs(Porg0, Porg_rhs, Sfx0, Sfy0, Sfz0, lev);
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for (int ithBH = 0; ithBH < BH_num; ithBH++)
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{
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][0], Porg[ithBH][0], Porg_rhs[ithBH][0], iter_count);
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][1], Porg[ithBH][1], Porg_rhs[ithBH][1], iter_count);
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f_rungekutta4_scalar(dT_lev, Porg0[ithBH][2], Porg[ithBH][2], Porg_rhs[ithBH][2], iter_count);
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if (Symmetry > 0)
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Porg[ithBH][2] = fabs(Porg[ithBH][2]);
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if (Symmetry == 2)
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{
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Porg[ithBH][0] = fabs(Porg[ithBH][0]);
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Porg[ithBH][1] = fabs(Porg[ithBH][1]);
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}
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}
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}
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if ((lev == a_lev) && (LastAnas + dT_lev >= AnasTime))
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z4c_cuda_download_level_state(GH->PatL[lev], SynchList_pre, myrank, false);
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if (lev == a_lev)
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@@ -640,6 +738,25 @@ void Z4c_class::Step(int lev, int YN)
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<< cg->bbox[2] << ":" << cg->bbox[5] << ")" << endl;
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ERROR = 1;
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}
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if (!ERROR && iter_count == 3 && need_constraint_after_step)
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{
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double *constraints[7] = {
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cg->fgfs[Cons_Ham->sgfn], cg->fgfs[Cons_Px->sgfn],
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cg->fgfs[Cons_Py->sgfn], cg->fgfs[Cons_Pz->sgfn],
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cg->fgfs[Cons_Gx->sgfn], cg->fgfs[Cons_Gy->sgfn],
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cg->fgfs[Cons_Gz->sgfn]};
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double *tz_out[1] = {cg->fgfs[TZ0->sgfn]};
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const int tz_index = 24;
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if (z4c_cuda_download_constraint_outputs(cg->shape, constraints) ||
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z4c_cuda_download_state_subset(cg, cg->shape, 1, &tz_index, tz_out))
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{
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cout << "CUDA Z4C constraint download failed in domain: ("
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<< cg->bbox[0] << ":" << cg->bbox[3] << ","
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<< cg->bbox[1] << ":" << cg->bbox[4] << ","
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<< cg->bbox[2] << ":" << cg->bbox[5] << ")" << endl;
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ERROR = 1;
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}
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}
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}
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if (BP == Pp->data->ble)
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break;
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@@ -719,7 +836,10 @@ void Z4c_class::Step(int lev, int YN)
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{
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const bool keep_resident = z4c_cuda_keep_resident_after_step(lev, trfls, a_lev);
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z4c_cuda_download_level_state(GH->PatL[lev], SynchList_cor, myrank, !keep_resident);
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const bool need_host_after_step =
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((lev == a_lev) && (LastAnas + dT_lev >= AnasTime));
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if (!keep_resident || need_host_after_step)
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z4c_cuda_download_level_state(GH->PatL[lev], SynchList_cor, myrank, !keep_resident);
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}
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#if (RPS == 0)
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@@ -2991,17 +3111,23 @@ void Z4c_class::Check_extrop()
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//================================================================================================
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void Z4c_class::Constraint_Out()
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{
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// here we have to use the same variable name as in the parent class
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LastConsOut += dT * pow(0.5, Mymax(0, trfls));
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if (LastConsOut >= AnasTime)
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// Constraint violation
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{
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// recompute least the constraint data lost for moved new grid
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for (int lev = 0; lev < GH->levels; lev++)
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{
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void Z4c_class::Constraint_Out()
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{
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// here we have to use the same variable name as in the parent class
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LastConsOut += dT * pow(0.5, Mymax(0, trfls));
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if (LastConsOut >= AnasTime)
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// Constraint violation
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{
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#if USE_CUDA_Z4C && (ABEtype == 2)
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bool cuda_constraints_ready = true;
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#else
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const bool cuda_constraints_ready = false;
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#endif
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// recompute least the constraint data lost for moved new grid
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if (!cuda_constraints_ready)
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for (int lev = 0; lev < GH->levels; lev++)
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{
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// make sure the data consistent for higher levels
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if (lev > 0)
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{
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@@ -28,6 +28,9 @@ using namespace std;
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#if USE_CUDA_BSSN
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#include "bssn_rhs_cuda.h"
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#endif
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#if USE_CUDA_Z4C && (ABEtype == 2)
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#include "z4c_rhs_cuda.h"
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#endif
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#include "initial_puncture.h"
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#include "enforce_algebra.h"
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#include "rungekutta4_rout.h"
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@@ -36,6 +39,12 @@ using namespace std;
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#include "shellfunctions.h"
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#include "parameters.h"
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#if (ABEtype == 1) || ((ABEtype == 2) && !USE_CUDA_Z4C)
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#define AMSS_LEGACY_ABE_TRANSFER 1
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#else
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#define AMSS_LEGACY_ABE_TRANSFER 0
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#endif
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#ifdef With_AHF
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#include "derivatives.h"
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#include "myglobal.h"
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@@ -647,6 +656,87 @@ void bssn_cuda_flush_level_before_regrid(MyList<Patch> *PatL,
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bssn_cuda_release_level_state(PatL, myrank);
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}
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#if USE_CUDA_Z4C && (ABEtype == 2)
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bool fill_z4c_cuda_views_for_regrid(Block *cg, MyList<var> *vars,
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double **host_views)
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{
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int idx = 0;
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while (vars && idx < Z4C_CUDA_STATE_COUNT)
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{
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host_views[idx] = cg->fgfs[vars->data->sgfn];
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vars = vars->next;
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++idx;
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}
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return idx == Z4C_CUDA_STATE_COUNT && vars == 0;
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}
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void z4c_cuda_download_level_state_if_present_for_regrid(MyList<Patch> *PatL,
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MyList<var> *vars,
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int myrank)
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{
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MyList<Patch> *Pp = PatL;
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while (Pp)
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{
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MyList<Block> *BP = Pp->data->blb;
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while (BP)
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{
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Block *cg = BP->data;
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if (myrank == cg->rank && z4c_cuda_has_resident_state(cg))
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{
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double *state_out[Z4C_CUDA_STATE_COUNT];
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if (!fill_z4c_cuda_views_for_regrid(cg, vars, state_out))
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{
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cout << "CUDA Z4C state list mismatch on regrid flush" << endl;
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MPI_Abort(MPI_COMM_WORLD, 1);
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}
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if (z4c_cuda_download_resident_state(cg, cg->shape, state_out))
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{
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cout << "CUDA Z4C resident state regrid download failed" << endl;
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MPI_Abort(MPI_COMM_WORLD, 1);
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}
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}
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if (BP == Pp->data->ble)
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break;
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BP = BP->next;
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}
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Pp = Pp->next;
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}
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}
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void z4c_cuda_release_level_state_for_regrid(MyList<Patch> *PatL, int myrank)
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{
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MyList<Patch> *Pp = PatL;
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while (Pp)
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{
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MyList<Block> *BP = Pp->data->blb;
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while (BP)
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{
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Block *cg = BP->data;
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if (myrank == cg->rank && z4c_cuda_has_resident_state(cg))
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z4c_cuda_release_step_ctx(cg);
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if (BP == Pp->data->ble)
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break;
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BP = BP->next;
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}
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Pp = Pp->next;
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}
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}
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void z4c_cuda_flush_level_before_regrid(MyList<Patch> *PatL,
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MyList<var> *corL,
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MyList<var> *oldL,
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MyList<var> *stateL,
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MyList<var> *preL,
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int myrank)
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{
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z4c_cuda_download_level_state_if_present_for_regrid(PatL, corL, myrank);
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z4c_cuda_download_level_state_if_present_for_regrid(PatL, oldL, myrank);
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z4c_cuda_download_level_state_if_present_for_regrid(PatL, stateL, myrank);
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z4c_cuda_download_level_state_if_present_for_regrid(PatL, preL, myrank);
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z4c_cuda_release_level_state_for_regrid(PatL, myrank);
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}
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#endif
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bool bssn_cuda_regrid_flush_enabled()
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{
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static int enabled = -1;
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@@ -2969,6 +3059,10 @@ void bssn_class::Evolve(int Steps)
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STEP_TIMER_DECL(timer_dump3d);
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// misc::tillherecheck("before Dump_Data");
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#if USE_CUDA_Z4C && (ABEtype == 2)
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for (int lev = 0; lev < GH->levels; lev++)
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z4c_cuda_download_level_state_if_present_for_regrid(GH->PatL[lev], StateList, myrank);
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#endif
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for (int lev = 0; lev < GH->levels; lev++)
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Parallel::Dump_Data(GH->PatL[lev], DumpList, 0, PhysTime, dT_mon);
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#ifdef WithShell
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@@ -2990,6 +3084,10 @@ void bssn_class::Evolve(int Steps)
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STEP_TIMER_DECL(timer_dump2d);
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// misc::tillherecheck("before 2dDump_Data");
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#if USE_CUDA_Z4C && (ABEtype == 2)
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for (int lev = 0; lev < GH->levels; lev++)
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z4c_cuda_download_level_state_if_present_for_regrid(GH->PatL[lev], StateList, myrank);
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#endif
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for (int lev = 0; lev < GH->levels; lev++)
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Parallel::d2Dump_Data(GH->PatL[lev], DumpList, 0, PhysTime, dT_mon);
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STEP_TIMER_ADD(TB_DUMP_2D, timer_dump2d);
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@@ -3018,13 +3116,21 @@ void bssn_class::Evolve(int Steps)
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#if (REGLEV == 1)
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STEP_TIMER_DECL(timer_regrid);
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#if USE_CUDA_BSSN
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#if USE_CUDA_BSSN && (ABEtype != 2)
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for (int il = 0; il < GH->levels; il++)
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if (bssn_cuda_should_flush_before_regrid(GH, il, Symmetry, BH_num, Porg0))
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bssn_cuda_flush_level_before_regrid(GH->PatL[il],
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SynchList_cor, OldStateList,
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StateList, SynchList_pre,
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myrank);
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#endif
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#if USE_CUDA_Z4C && USE_CUDA_BSSN && (ABEtype == 2)
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for (int il = 0; il < GH->levels; il++)
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if (bssn_cuda_should_flush_before_regrid(GH, il, Symmetry, BH_num, Porg0))
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z4c_cuda_flush_level_before_regrid(GH->PatL[il],
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SynchList_cor, OldStateList,
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StateList, SynchList_pre,
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myrank);
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#endif
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GH->Regrid(Symmetry, BH_num, Porgbr, Porg0,
|
||||
SynchList_cor, OldStateList, StateList, SynchList_pre,
|
||||
@@ -3113,6 +3219,10 @@ void bssn_class::Evolve(int Steps)
|
||||
STEP_TIMER_DECL(timer_checkpoint);
|
||||
LastCheck = 0;
|
||||
|
||||
#if USE_CUDA_Z4C && (ABEtype == 2)
|
||||
for (int lev = 0; lev < GH->levels; lev++)
|
||||
z4c_cuda_download_level_state_if_present_for_regrid(GH->PatL[lev], StateList, myrank);
|
||||
#endif
|
||||
CheckPoint->write_Black_Hole_position(BH_num_input, BH_num, Porg0, Porgbr, Mass);
|
||||
CheckPoint->writecheck_cgh(PhysTime, GH);
|
||||
#ifdef WithShell
|
||||
@@ -4346,7 +4456,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
|
||||
STEP_TIMER_DECL(timer_predictor_sync);
|
||||
Parallel::AsyncSyncState async_pre;
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_start(GH->PatL[lev], SynchList_pre, Symmetry, sync_cache_pre[lev], async_pre);
|
||||
@@ -4369,7 +4479,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#if (ABEtype != 1 && ABEtype != 2)
|
||||
#if !AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync_finish(sync_cache_pre[lev], async_pre, SynchList_pre, Symmetry);
|
||||
#endif
|
||||
STEP_TIMER_ADD(TB_PREDICTOR_SYNC, timer_predictor_sync);
|
||||
@@ -4793,7 +4903,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
|
||||
STEP_TIMER_DECL(timer_corrector_sync);
|
||||
Parallel::AsyncSyncState async_cor;
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_cor, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_start(GH->PatL[lev], SynchList_cor, Symmetry, sync_cache_cor[lev], async_cor);
|
||||
@@ -4816,7 +4926,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#if (ABEtype != 1 && ABEtype != 2)
|
||||
#if !AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync_finish(sync_cache_cor[lev], async_cor, SynchList_cor, Symmetry);
|
||||
#endif
|
||||
STEP_TIMER_ADD(TB_CORRECTOR_SYNC, timer_corrector_sync);
|
||||
@@ -5312,7 +5422,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
#endif
|
||||
|
||||
Parallel::AsyncSyncState async_pre;
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_start(GH->PatL[lev], SynchList_pre, Symmetry, sync_cache_pre[lev], async_pre);
|
||||
@@ -5335,7 +5445,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#if (ABEtype != 1 && ABEtype != 2)
|
||||
#if !AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync_finish(sync_cache_pre[lev], async_pre, SynchList_pre, Symmetry);
|
||||
#endif
|
||||
|
||||
@@ -5663,7 +5773,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
#endif
|
||||
|
||||
Parallel::AsyncSyncState async_cor;
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_cor, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_start(GH->PatL[lev], SynchList_cor, Symmetry, sync_cache_cor[lev], async_cor);
|
||||
@@ -5686,7 +5796,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
}
|
||||
}
|
||||
#endif
|
||||
#if (ABEtype != 1 && ABEtype != 2)
|
||||
#if !AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync_finish(sync_cache_cor[lev], async_cor, SynchList_cor, Symmetry);
|
||||
#endif
|
||||
|
||||
@@ -6080,7 +6190,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
|
||||
// misc::tillherecheck(GH->Commlev[lev],GH->start_rank[lev],"before Predictor sync");
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_cached(GH->PatL[lev], SynchList_pre, Symmetry, sync_cache_pre[lev]);
|
||||
@@ -6285,7 +6395,7 @@ void bssn_class::Step(int lev, int YN)
|
||||
|
||||
// misc::tillherecheck(GH->Commlev[lev],GH->start_rank[lev],"before Corrector sync");
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_cor, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_cached(GH->PatL[lev], SynchList_cor, Symmetry, sync_cache_cor[lev]);
|
||||
@@ -6926,7 +7036,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
#endif
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SL, SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SL, SynchList_pre, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -6943,7 +7053,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
// misc::tillherecheck(GH->Commlev[GH->mylev],GH->start_rank[GH->mylev],a_stream.str());
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], SynchList_pre, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -6960,7 +7070,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7001,7 +7111,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
#endif
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SL, SL, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SL, SL, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -7018,7 +7128,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
// misc::tillherecheck(GH->Commlev[GH->mylev],GH->start_rank[GH->mylev],a_stream.str());
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], SL, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -7035,7 +7145,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7066,7 +7176,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB,
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SL, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_cached(GH->PatL[lev], SL, Symmetry, sync_cache_rp_fine[lev]);
|
||||
@@ -7124,7 +7234,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
}
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SL, SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SL, SynchList_pre, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -7134,7 +7244,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
Parallel::Restrict_bam(GH->PatL[lev - 1], GH->PatL[lev], SL, SynchList_pre, GH->rsul[lev], Symmetry);
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], SynchList_pre, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -7144,7 +7254,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7170,7 +7280,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
else // no time refinement levels and for all same time levels
|
||||
{
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SL, SL, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SL, SL, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -7180,7 +7290,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
Parallel::Restrict_bam(GH->PatL[lev - 1], GH->PatL[lev], SL, SL, GH->rsul[lev], Symmetry);
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], SL, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -7190,7 +7300,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7214,7 +7324,7 @@ void bssn_class::RestrictProlong_aux(int lev, int YN, bool BB,
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SL, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_cached(GH->PatL[lev], SL, Symmetry, sync_cache_rp_fine[lev]);
|
||||
@@ -7265,7 +7375,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
}
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, SynchList_pre, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, SynchList_pre, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -7275,7 +7385,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
Parallel::Restrict_bam(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, SynchList_pre, GH->rsul[lev], Symmetry);
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], SynchList_pre, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -7285,7 +7395,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7313,7 +7423,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
if (myrank == 0)
|
||||
cout << "===: " << GH->Lt[lev - 1] << "," << GH->Lt[lev] + dT_lev << endl;
|
||||
#if (RPB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Restrict(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, StateList, Symmetry);
|
||||
#else
|
||||
Parallel::Restrict_cached(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, StateList, Symmetry, sync_cache_restrict[lev]);
|
||||
@@ -7323,7 +7433,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
Parallel::Restrict_bam(GH->PatL[lev - 1], GH->PatL[lev], SynchList_cor, StateList, GH->rsul[lev], Symmetry);
|
||||
#endif
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev - 1], StateList, Symmetry);
|
||||
#else
|
||||
#if (RP_SYNC_COARSE_AFTER_RESTRICT == 1)
|
||||
@@ -7333,7 +7443,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
|
||||
#if (RPB == 0)
|
||||
#if (MIXOUTB == 0)
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Ppc = GH->PatL[lev - 1];
|
||||
while (Ppc)
|
||||
{
|
||||
@@ -7357,7 +7467,7 @@ void bssn_class::RestrictProlong(int lev, int YN, bool BB)
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
Parallel::Sync(GH->PatL[lev], SynchList_cor, Symmetry);
|
||||
#else
|
||||
Parallel::Sync_cached(GH->PatL[lev], SynchList_cor, Symmetry, sync_cache_rp_fine[lev]);
|
||||
@@ -9065,7 +9175,7 @@ void bssn_class::AH_Step_Find(int lev, double dT_lev)
|
||||
|
||||
ihn++;
|
||||
}
|
||||
#if (ABEtype == 1 || ABEtype == 2)
|
||||
#if AMSS_LEGACY_ABE_TRANSFER
|
||||
if (PhysTime > 10)
|
||||
{
|
||||
ihn--;
|
||||
|
||||
@@ -7788,7 +7788,7 @@ extern "C" int z4c_cuda_rk4_substep(void *block_tag,
|
||||
}
|
||||
|
||||
double t0 = profile ? cuda_profile_now_ms() : 0.0;
|
||||
if (!use_resident_state || RK4 == 0 || !ctx.state_ready) {
|
||||
if (!use_resident_state || !ctx.state_ready) {
|
||||
upload_state_inputs(state_host_in, all);
|
||||
}
|
||||
if (apply_enforce_ga) {
|
||||
@@ -8117,6 +8117,35 @@ extern "C" int z4c_cuda_upload_state_subset(void *block_tag,
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern "C" int z4c_cuda_compute_constraints_resident(void *block_tag,
|
||||
int *ex, double *X, double *Y, double *Z,
|
||||
int Symmetry, double eps, int co,
|
||||
double **constraint_host_out)
|
||||
{
|
||||
using namespace z4c_cuda;
|
||||
init_gpu_dispatch();
|
||||
CUDA_CHECK(cudaSetDevice(g_dispatch.my_device));
|
||||
if (!block_tag || !ex || !constraint_host_out) return 1;
|
||||
StepContext &ctx = ensure_step_ctx(block_tag, (size_t)ex[0] * ex[1] * ex[2]);
|
||||
if (!ctx.state_ready) return 1;
|
||||
setup_grid_params(ex, X, Y, Z, Symmetry, eps, co);
|
||||
bind_state_input_slots(ctx.d_state_curr);
|
||||
launch_z4c_rhs_pipeline((int)((size_t)ex[0] * ex[1] * ex[2]), eps);
|
||||
download_constraint_outputs(constraint_host_out, (size_t)ex[0] * ex[1] * ex[2]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern "C" int z4c_cuda_download_constraint_outputs(int *ex,
|
||||
double **constraint_host_out)
|
||||
{
|
||||
using namespace z4c_cuda;
|
||||
init_gpu_dispatch();
|
||||
CUDA_CHECK(cudaSetDevice(g_dispatch.my_device));
|
||||
if (!ex || !constraint_host_out) return 1;
|
||||
download_constraint_outputs(constraint_host_out, (size_t)ex[0] * ex[1] * ex[2]);
|
||||
return 0;
|
||||
}
|
||||
|
||||
extern "C" int z4c_cuda_has_resident_state(void *block_tag)
|
||||
{
|
||||
using namespace z4c_cuda;
|
||||
|
||||
@@ -133,6 +133,14 @@ int z4c_cuda_upload_state_subset(void *block_tag,
|
||||
const int *state_indices,
|
||||
double **state_host_in);
|
||||
|
||||
int z4c_cuda_compute_constraints_resident(void *block_tag,
|
||||
int *ex, double *X, double *Y, double *Z,
|
||||
int Symmetry, double eps, int co,
|
||||
double **constraint_host_out);
|
||||
|
||||
int z4c_cuda_download_constraint_outputs(int *ex,
|
||||
double **constraint_host_out);
|
||||
|
||||
int z4c_cuda_has_resident_state(void *block_tag);
|
||||
|
||||
void z4c_cuda_release_step_ctx(void *block_tag);
|
||||
|
||||
@@ -145,7 +145,9 @@ def _gpu_runtime_env():
|
||||
"AMSS_ANALYSIS_MAP_EVERY": "1000000",
|
||||
"AMSS_CUDA_AWARE_MPI": "1",
|
||||
"AMSS_CUDA_KEEP_RESIDENT_AFTER_STEP": "1",
|
||||
"AMSS_CUDA_Z4C_KEEP_RESIDENT_AFTER_STEP": "1",
|
||||
"AMSS_CUDA_KEEP_ALL_LEVELS": "1",
|
||||
"AMSS_CUDA_Z4C_AMR_DEVICE": "1",
|
||||
"AMSS_CUDA_AMR_RESTRICT_DEVICE": "1",
|
||||
"AMSS_CUDA_AMR_RESTRICT_BATCH": "0",
|
||||
"AMSS_CUDA_DEVICE_SEGMENT_BATCH": "0",
|
||||
@@ -276,7 +278,9 @@ def run_ABE():
|
||||
print(f" AMSS_ANALYSIS_MAP_EVERY={mpi_env.get('AMSS_ANALYSIS_MAP_EVERY', '')}")
|
||||
print(f" AMSS_CUDA_AWARE_MPI={mpi_env.get('AMSS_CUDA_AWARE_MPI', '')}")
|
||||
print(f" AMSS_CUDA_KEEP_RESIDENT_AFTER_STEP={mpi_env.get('AMSS_CUDA_KEEP_RESIDENT_AFTER_STEP', '')}")
|
||||
print(f" AMSS_CUDA_Z4C_KEEP_RESIDENT_AFTER_STEP={mpi_env.get('AMSS_CUDA_Z4C_KEEP_RESIDENT_AFTER_STEP', '')}")
|
||||
print(f" AMSS_CUDA_KEEP_ALL_LEVELS={mpi_env.get('AMSS_CUDA_KEEP_ALL_LEVELS', '')}")
|
||||
print(f" AMSS_CUDA_Z4C_AMR_DEVICE={mpi_env.get('AMSS_CUDA_Z4C_AMR_DEVICE', '')}")
|
||||
print(f" AMSS_CUDA_AMR_RESTRICT_DEVICE={mpi_env.get('AMSS_CUDA_AMR_RESTRICT_DEVICE', '')}")
|
||||
print(f" AMSS_CUDA_AMR_RESTRICT_BATCH={mpi_env.get('AMSS_CUDA_AMR_RESTRICT_BATCH', '')}")
|
||||
print(f" AMSS_CUDA_DEVICE_SEGMENT_BATCH={mpi_env.get('AMSS_CUDA_DEVICE_SEGMENT_BATCH', '')}")
|
||||
|
||||
Reference in New Issue
Block a user