gh0s7/micore
1
1
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Add constraint file and display module

Browse Source
This commit is contained in:
CGH0S7
2024-12-28 09:05:23 +08:00
parent 66cda81233
commit 320f71ac96
3 changed files with 501 additions and 399 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
micore.xdc Executable file
View File

@ -0,0 +1,32 @@
create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
set_property PACKAGE_PIN W5 [get_ports clk]
set_property IOSTANDARD LVCMOS33 [get_ports clk]
set_property PACKAGE_PIN V17 [get_ports reset]
set_property IOSTANDARD LVCMOS33 [get_ports reset]
set_property PACKAGE_PIN E19 [get_ports success_led]
set_property IOSTANDARD LVCMOS33 [get_ports success_led]
set_property PACKAGE_PIN U19 [get_ports fail_led]
set_property IOSTANDARD LVCMOS33 [get_ports fail_led]
set_property PACKAGE_PIN U2 [get_ports {io_anodes[0]}]
set_property PACKAGE_PIN U4 [get_ports {io_anodes[1]}]
set_property PACKAGE_PIN V4 [get_ports {io_anodes[2]}]
set_property PACKAGE_PIN W4 [get_ports {io_anodes[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_anodes[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_anodes[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_anodes[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_anodes[3]}]
set_property PACKAGE_PIN U7 [get_ports {io_segments[0]}]
set_property PACKAGE_PIN V5 [get_ports {io_segments[1]}]
set_property PACKAGE_PIN U5 [get_ports {io_segments[2]}]
set_property PACKAGE_PIN V8 [get_ports {io_segments[3]}]
set_property PACKAGE_PIN U8 [get_ports {io_segments[4]}]
set_property PACKAGE_PIN W6 [get_ports {io_segments[5]}]
set_property PACKAGE_PIN W7 [get_ports {io_segments[6]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[1]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[2]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[3]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[4]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[5]}]
set_property IOSTANDARD LVCMOS33 [get_ports {io_segments[6]}]