Merge branch 'backend' into SCCP
This commit is contained in:
rain2133
2
.gitignore
vendored
2
.gitignore
vendored
@ -36,7 +36,7 @@
|
||||
doxygen
|
||||
|
||||
!/testdata/functional/*.out
|
||||
!/testdata/performance/*.out
|
||||
!/testdata/h_functional/*.out
|
||||
build/
|
||||
.antlr
|
||||
.vscode/
|
||||
|
||||
160
src/AddressCalculationExpansion.cpp
Normal file
160
src/AddressCalculationExpansion.cpp
Normal file
@ -0,0 +1,160 @@
|
||||
#include "AddressCalculationExpansion.h"
|
||||
#include <iostream>
|
||||
#include <vector>
|
||||
#include "IR.h"
|
||||
#include "IRBuilder.h"
|
||||
|
||||
extern int DEBUG;
|
||||
|
||||
namespace sysy {
|
||||
|
||||
bool AddressCalculationExpansion::run() {
|
||||
bool changed = false;
|
||||
|
||||
for (auto& funcPair : pModule->getFunctions()) {
|
||||
Function* func = funcPair.second.get();
|
||||
for (auto& bb_ptr : func->getBasicBlocks()) {
|
||||
BasicBlock* bb = bb_ptr.get();
|
||||
for (auto it = bb->getInstructions().begin(); it != bb->getInstructions().end(); ) {
|
||||
Instruction* inst = it->get();
|
||||
|
||||
Value* basePointer = nullptr;
|
||||
Value* valueToStore = nullptr;
|
||||
size_t firstIndexOperandIdx = 0;
|
||||
size_t numBaseOperands = 0;
|
||||
|
||||
if (inst->isLoad()) {
|
||||
numBaseOperands = 1;
|
||||
basePointer = inst->getOperand(0);
|
||||
firstIndexOperandIdx = 1;
|
||||
} else if (inst->isStore()) {
|
||||
numBaseOperands = 2;
|
||||
valueToStore = inst->getOperand(0);
|
||||
basePointer = inst->getOperand(1);
|
||||
firstIndexOperandIdx = 2;
|
||||
} else {
|
||||
++it;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (inst->getNumOperands() <= numBaseOperands) {
|
||||
++it;
|
||||
continue;
|
||||
}
|
||||
|
||||
std::vector<int> dims;
|
||||
if (AllocaInst* allocaInst = dynamic_cast<AllocaInst*>(basePointer)) {
|
||||
for (const auto& use_ptr : allocaInst->getDims()) {
|
||||
Value* dimValue = use_ptr->getValue();
|
||||
if (ConstantValue* constVal = dynamic_cast<ConstantValue*>(dimValue)) {
|
||||
dims.push_back(constVal->getInt());
|
||||
} else {
|
||||
std::cerr << "Warning: AllocaInst dimension is not a constant integer. Skipping GEP expansion for: ";
|
||||
SysYPrinter::printValue(allocaInst);
|
||||
std::cerr << "\n";
|
||||
dims.clear();
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else if (GlobalValue* globalValue = dynamic_cast<GlobalValue*>(basePointer)) {
|
||||
std::cerr << "Warning: GlobalValue dimension handling needs explicit implementation for GEP expansion. Skipping GEP for: ";
|
||||
SysYPrinter::printValue(globalValue);
|
||||
std::cerr << "\n";
|
||||
++it;
|
||||
continue;
|
||||
} else {
|
||||
std::cerr << "Warning: Base pointer is not AllocaInst/GlobalValue or its array dimensions cannot be determined for GEP expansion. Skipping GEP for: ";
|
||||
SysYPrinter::printValue(basePointer);
|
||||
std::cerr << " in instruction ";
|
||||
SysYPrinter::printInst(inst);
|
||||
std::cerr << "\n";
|
||||
++it;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (dims.empty() && (inst->getNumOperands() > numBaseOperands)) {
|
||||
if (DEBUG) {
|
||||
std::cerr << "ACE Warning: Could not get valid array dimensions for ";
|
||||
SysYPrinter::printValue(basePointer);
|
||||
std::cerr << " in instruction ";
|
||||
SysYPrinter::printInst(inst);
|
||||
std::cerr << " (expected dimensions for indices, but got none).\n";
|
||||
}
|
||||
++it;
|
||||
continue;
|
||||
}
|
||||
|
||||
std::vector<Value*> indexOperands;
|
||||
for (size_t i = firstIndexOperandIdx; i < inst->getNumOperands(); ++i) {
|
||||
indexOperands.push_back(inst->getOperand(i));
|
||||
}
|
||||
|
||||
if (AllocaInst* allocaInst = dynamic_cast<AllocaInst*>(basePointer)) {
|
||||
if (allocaInst->getNumDims() != indexOperands.size()) {
|
||||
if (DEBUG) {
|
||||
std::cerr << "ACE Warning: Index count (" << indexOperands.size() << ") does not match AllocaInst dimensions (" << allocaInst->getNumDims() << ") for instruction ";
|
||||
SysYPrinter::printInst(inst);
|
||||
std::cerr << "\n";
|
||||
}
|
||||
++it;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
Value* totalOffset = ConstantInteger::get(0);
|
||||
pBuilder->setPosition(bb, it);
|
||||
|
||||
for (size_t i = 0; i < indexOperands.size(); ++i) {
|
||||
Value* index = indexOperands[i];
|
||||
int stride = calculateStride(dims, i);
|
||||
Value* strideConst = ConstantInteger::get(stride);
|
||||
Type* intType = Type::getIntType();
|
||||
BinaryInst* currentDimOffsetInst = pBuilder->createBinaryInst(Instruction::kMul, intType, index, strideConst);
|
||||
BinaryInst* newTotalOffsetInst = pBuilder->createBinaryInst(Instruction::kAdd, intType, totalOffset, currentDimOffsetInst);
|
||||
totalOffset = newTotalOffsetInst;
|
||||
}
|
||||
|
||||
// 计算有效地址：effective_address = basePointer + totalOffset
|
||||
Value* effective_address = pBuilder->createBinaryInst(Instruction::kAdd, basePointer->getType(), basePointer, totalOffset);
|
||||
|
||||
// 创建新的 LoadInst 或 StoreInst，indices 为空
|
||||
Instruction* newInst = nullptr;
|
||||
if (inst->isLoad()) {
|
||||
newInst = pBuilder->createLoadInst(effective_address, {});
|
||||
inst->replaceAllUsesWith(newInst);
|
||||
} else { // StoreInst
|
||||
newInst = pBuilder->createStoreInst(valueToStore, effective_address, {});
|
||||
}
|
||||
|
||||
Instruction* oldInst = it->get();
|
||||
++it;
|
||||
|
||||
for (size_t i = 0; i < oldInst->getNumOperands(); ++i) {
|
||||
Value* operandValue = oldInst->getOperand(i);
|
||||
if (operandValue) {
|
||||
for (auto use_it = operandValue->getUses().begin(); use_it != operandValue->getUses().end(); ++use_it) {
|
||||
if ((*use_it)->getUser() == oldInst && (*use_it)->getIndex() == i) {
|
||||
operandValue->removeUse(*use_it);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bb->getInstructions().erase(std::prev(it));
|
||||
changed = true;
|
||||
|
||||
if (DEBUG) {
|
||||
std::cerr << "ACE: Computed effective address:\n";
|
||||
SysYPrinter::printInst(dynamic_cast<Instruction*>(effective_address));
|
||||
std::cerr << "ACE: New Load/Store instruction:\n";
|
||||
SysYPrinter::printInst(newInst);
|
||||
std::cerr << "--------------------------------\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return changed;
|
||||
}
|
||||
|
||||
} // namespace sysy
|
||||
@ -23,10 +23,15 @@ add_executable(sysyc
|
||||
SysYIRPrinter.cpp
|
||||
SysYIRCFGOpt.cpp
|
||||
SysYIRAnalyser.cpp
|
||||
DeadCodeElimination.cpp
|
||||
Mem2Reg.cpp
|
||||
Reg2Mem.cpp
|
||||
# DeadCodeElimination.cpp
|
||||
AddressCalculationExpansion.cpp
|
||||
# Mem2Reg.cpp
|
||||
# Reg2Mem.cpp
|
||||
RISCv64Backend.cpp
|
||||
RISCv64ISel.cpp
|
||||
RISCv64RegAlloc.cpp
|
||||
RISCv64AsmPrinter.cpp
|
||||
RISCv64Passes.cpp
|
||||
)
|
||||
|
||||
# 设置 include 路径，包含 ANTLR 运行时库和项目头文件
|
||||
|
||||
225
src/RISCv64AsmPrinter.cpp
Normal file
225
src/RISCv64AsmPrinter.cpp
Normal file
@ -0,0 +1,225 @@
|
||||
#include "RISCv64AsmPrinter.h"
|
||||
#include "RISCv64ISel.h"
|
||||
#include <stdexcept>
|
||||
|
||||
namespace sysy {
|
||||
|
||||
// 检查是否为内存加载/存储指令，以处理特殊的打印格式
|
||||
bool isMemoryOp(RVOpcodes opcode) {
|
||||
switch (opcode) {
|
||||
case RVOpcodes::LB: case RVOpcodes::LH: case RVOpcodes::LW: case RVOpcodes::LD:
|
||||
case RVOpcodes::LBU: case RVOpcodes::LHU: case RVOpcodes::LWU:
|
||||
case RVOpcodes::SB: case RVOpcodes::SH: case RVOpcodes::SW: case RVOpcodes::SD:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
RISCv64AsmPrinter::RISCv64AsmPrinter(MachineFunction* mfunc) : MFunc(mfunc) {}
|
||||
|
||||
void RISCv64AsmPrinter::run(std::ostream& os) {
|
||||
OS = &os;
|
||||
|
||||
*OS << ".globl " << MFunc->getName() << "\n";
|
||||
*OS << MFunc->getName() << ":\n";
|
||||
|
||||
printPrologue();
|
||||
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
printBasicBlock(mbb.get());
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64AsmPrinter::printPrologue() {
|
||||
StackFrameInfo& frame_info = MFunc->getFrameInfo();
|
||||
// 序言需要为保存ra和s0预留16字节
|
||||
int total_stack_size = frame_info.locals_size + frame_info.spill_size + 16;
|
||||
int aligned_stack_size = (total_stack_size + 15) & ~15;
|
||||
frame_info.total_size = aligned_stack_size;
|
||||
|
||||
if (aligned_stack_size > 0) {
|
||||
*OS << " addi sp, sp, -" << aligned_stack_size << "\n";
|
||||
*OS << " sd ra, " << (aligned_stack_size - 8) << "(sp)\n";
|
||||
*OS << " sd s0, " << (aligned_stack_size - 16) << "(sp)\n";
|
||||
*OS << " mv s0, sp\n";
|
||||
}
|
||||
|
||||
// 忠实还原保存函数入口参数的逻辑
|
||||
Function* F = MFunc->getFunc();
|
||||
if (F && F->getEntryBlock()) {
|
||||
int arg_idx = 0;
|
||||
RISCv64ISel* isel = MFunc->getISel();
|
||||
for (AllocaInst* alloca_for_param : F->getEntryBlock()->getArguments()) {
|
||||
if (arg_idx >= 8) break;
|
||||
|
||||
unsigned vreg = isel->getVReg(alloca_for_param);
|
||||
if (frame_info.alloca_offsets.count(vreg)) {
|
||||
int offset = frame_info.alloca_offsets.at(vreg);
|
||||
auto arg_reg = static_cast<PhysicalReg>(static_cast<int>(PhysicalReg::A0) + arg_idx);
|
||||
*OS << " sw " << regToString(arg_reg) << ", " << offset << "(s0)\n";
|
||||
}
|
||||
arg_idx++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64AsmPrinter::printEpilogue() {
|
||||
int aligned_stack_size = MFunc->getFrameInfo().total_size;
|
||||
if (aligned_stack_size > 0) {
|
||||
*OS << " ld ra, " << (aligned_stack_size - 8) << "(sp)\n";
|
||||
*OS << " ld s0, " << (aligned_stack_size - 16) << "(sp)\n";
|
||||
*OS << " addi sp, sp, " << aligned_stack_size << "\n";
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64AsmPrinter::printBasicBlock(MachineBasicBlock* mbb) {
|
||||
if (!mbb->getName().empty()) {
|
||||
*OS << mbb->getName() << ":\n";
|
||||
}
|
||||
for (auto& instr : mbb->getInstructions()) {
|
||||
printInstruction(instr.get());
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64AsmPrinter::printInstruction(MachineInstr* instr) {
|
||||
auto opcode = instr->getOpcode();
|
||||
if (opcode == RVOpcodes::RET) {
|
||||
printEpilogue();
|
||||
}
|
||||
if (opcode != RVOpcodes::LABEL) {
|
||||
*OS << " ";
|
||||
}
|
||||
|
||||
switch (opcode) {
|
||||
case RVOpcodes::ADD: *OS << "add "; break; case RVOpcodes::ADDI: *OS << "addi "; break;
|
||||
case RVOpcodes::ADDW: *OS << "addw "; break; case RVOpcodes::ADDIW: *OS << "addiw "; break;
|
||||
case RVOpcodes::SUB: *OS << "sub "; break; case RVOpcodes::SUBW: *OS << "subw "; break;
|
||||
case RVOpcodes::MUL: *OS << "mul "; break; case RVOpcodes::MULW: *OS << "mulw "; break;
|
||||
case RVOpcodes::DIV: *OS << "div "; break; case RVOpcodes::DIVW: *OS << "divw "; break;
|
||||
case RVOpcodes::REM: *OS << "rem "; break; case RVOpcodes::REMW: *OS << "remw "; break;
|
||||
case RVOpcodes::XOR: *OS << "xor "; break; case RVOpcodes::XORI: *OS << "xori "; break;
|
||||
case RVOpcodes::OR: *OS << "or "; break; case RVOpcodes::ORI: *OS << "ori "; break;
|
||||
case RVOpcodes::AND: *OS << "and "; break; case RVOpcodes::ANDI: *OS << "andi "; break;
|
||||
case RVOpcodes::SLL: *OS << "sll "; break; case RVOpcodes::SLLI: *OS << "slli "; break;
|
||||
case RVOpcodes::SLLW: *OS << "sllw "; break; case RVOpcodes::SLLIW: *OS << "slliw "; break;
|
||||
case RVOpcodes::SRL: *OS << "srl "; break; case RVOpcodes::SRLI: *OS << "srli "; break;
|
||||
case RVOpcodes::SRLW: *OS << "srlw "; break; case RVOpcodes::SRLIW: *OS << "srliw "; break;
|
||||
case RVOpcodes::SRA: *OS << "sra "; break; case RVOpcodes::SRAI: *OS << "srai "; break;
|
||||
case RVOpcodes::SRAW: *OS << "sraw "; break; case RVOpcodes::SRAIW: *OS << "sraiw "; break;
|
||||
case RVOpcodes::SLT: *OS << "slt "; break; case RVOpcodes::SLTI: *OS << "slti "; break;
|
||||
case RVOpcodes::SLTU: *OS << "sltu "; break; case RVOpcodes::SLTIU: *OS << "sltiu "; break;
|
||||
case RVOpcodes::LW: *OS << "lw "; break; case RVOpcodes::LH: *OS << "lh "; break;
|
||||
case RVOpcodes::LB: *OS << "lb "; break; case RVOpcodes::LWU: *OS << "lwu "; break;
|
||||
case RVOpcodes::LHU: *OS << "lhu "; break; case RVOpcodes::LBU: *OS << "lbu "; break;
|
||||
case RVOpcodes::SW: *OS << "sw "; break; case RVOpcodes::SH: *OS << "sh "; break;
|
||||
case RVOpcodes::SB: *OS << "sb "; break; case RVOpcodes::LD: *OS << "ld "; break;
|
||||
case RVOpcodes::SD: *OS << "sd "; break;
|
||||
case RVOpcodes::J: *OS << "j "; break; case RVOpcodes::JAL: *OS << "jal "; break;
|
||||
case RVOpcodes::JALR: *OS << "jalr "; break; case RVOpcodes::RET: *OS << "ret"; break;
|
||||
case RVOpcodes::BEQ: *OS << "beq "; break; case RVOpcodes::BNE: *OS << "bne "; break;
|
||||
case RVOpcodes::BLT: *OS << "blt "; break; case RVOpcodes::BGE: *OS << "bge "; break;
|
||||
case RVOpcodes::BLTU: *OS << "bltu "; break; case RVOpcodes::BGEU: *OS << "bgeu "; break;
|
||||
case RVOpcodes::LI: *OS << "li "; break; case RVOpcodes::LA: *OS << "la "; break;
|
||||
case RVOpcodes::MV: *OS << "mv "; break; case RVOpcodes::NEG: *OS << "neg "; break;
|
||||
case RVOpcodes::NEGW: *OS << "negw "; break; case RVOpcodes::SEQZ: *OS << "seqz "; break;
|
||||
case RVOpcodes::SNEZ: *OS << "snez "; break;
|
||||
case RVOpcodes::CALL: *OS << "call "; break;
|
||||
case RVOpcodes::LABEL:
|
||||
printOperand(instr->getOperands()[0].get());
|
||||
*OS << ":";
|
||||
break;
|
||||
case RVOpcodes::FRAME_LOAD:
|
||||
case RVOpcodes::FRAME_STORE:
|
||||
// These should have been eliminated by RegAlloc
|
||||
throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
|
||||
default:
|
||||
throw std::runtime_error("Unknown opcode in AsmPrinter");
|
||||
}
|
||||
|
||||
const auto& operands = instr->getOperands();
|
||||
if (!operands.empty()) {
|
||||
if (isMemoryOp(opcode)) {
|
||||
printOperand(operands[0].get());
|
||||
*OS << ", ";
|
||||
printOperand(operands[1].get());
|
||||
} else {
|
||||
for (size_t i = 0; i < operands.size(); ++i) {
|
||||
printOperand(operands[i].get());
|
||||
if (i < operands.size() - 1) {
|
||||
*OS << ", ";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
*OS << "\n";
|
||||
}
|
||||
|
||||
void RISCv64AsmPrinter::printOperand(MachineOperand* op) {
|
||||
if (!op) return;
|
||||
switch(op->getKind()) {
|
||||
case MachineOperand::KIND_REG: {
|
||||
auto reg_op = static_cast<RegOperand*>(op);
|
||||
if (reg_op->isVirtual()) {
|
||||
*OS << "%vreg" << reg_op->getVRegNum();
|
||||
} else {
|
||||
*OS << regToString(reg_op->getPReg());
|
||||
}
|
||||
break;
|
||||
}
|
||||
case MachineOperand::KIND_IMM:
|
||||
*OS << static_cast<ImmOperand*>(op)->getValue();
|
||||
break;
|
||||
case MachineOperand::KIND_LABEL:
|
||||
*OS << static_cast<LabelOperand*>(op)->getName();
|
||||
break;
|
||||
case MachineOperand::KIND_MEM: {
|
||||
auto mem_op = static_cast<MemOperand*>(op);
|
||||
printOperand(mem_op->getOffset());
|
||||
*OS << "(";
|
||||
printOperand(mem_op->getBase());
|
||||
*OS << ")";
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
std::string RISCv64AsmPrinter::regToString(PhysicalReg reg) {
|
||||
switch (reg) {
|
||||
case PhysicalReg::ZERO: return "x0"; case PhysicalReg::RA: return "ra";
|
||||
case PhysicalReg::SP: return "sp"; case PhysicalReg::GP: return "gp";
|
||||
case PhysicalReg::TP: return "tp"; case PhysicalReg::T0: return "t0";
|
||||
case PhysicalReg::T1: return "t1"; case PhysicalReg::T2: return "t2";
|
||||
case PhysicalReg::S0: return "s0"; case PhysicalReg::S1: return "s1";
|
||||
case PhysicalReg::A0: return "a0"; case PhysicalReg::A1: return "a1";
|
||||
case PhysicalReg::A2: return "a2"; case PhysicalReg::A3: return "a3";
|
||||
case PhysicalReg::A4: return "a4"; case PhysicalReg::A5: return "a5";
|
||||
case PhysicalReg::A6: return "a6"; case PhysicalReg::A7: return "a7";
|
||||
case PhysicalReg::S2: return "s2"; case PhysicalReg::S3: return "s3";
|
||||
case PhysicalReg::S4: return "s4"; case PhysicalReg::S5: return "s5";
|
||||
case PhysicalReg::S6: return "s6"; case PhysicalReg::S7: return "s7";
|
||||
case PhysicalReg::S8: return "s8"; case PhysicalReg::S9: return "s9";
|
||||
case PhysicalReg::S10: return "s10"; case PhysicalReg::S11: return "s11";
|
||||
case PhysicalReg::T3: return "t3"; case PhysicalReg::T4: return "t4";
|
||||
case PhysicalReg::T5: return "t5"; case PhysicalReg::T6: return "t6";
|
||||
case PhysicalReg::F0: return "f0"; case PhysicalReg::F1: return "f1";
|
||||
case PhysicalReg::F2: return "f2"; case PhysicalReg::F3: return "f3";
|
||||
case PhysicalReg::F4: return "f4"; case PhysicalReg::F5: return "f5";
|
||||
case PhysicalReg::F6: return "f6"; case PhysicalReg::F7: return "f7";
|
||||
case PhysicalReg::F8: return "f8"; case PhysicalReg::F9: return "f9";
|
||||
case PhysicalReg::F10: return "f10"; case PhysicalReg::F11: return "f11";
|
||||
case PhysicalReg::F12: return "f12"; case PhysicalReg::F13: return "f13";
|
||||
case PhysicalReg::F14: return "f14"; case PhysicalReg::F15: return "f15";
|
||||
case PhysicalReg::F16: return "f16"; case PhysicalReg::F17: return "f17";
|
||||
case PhysicalReg::F18: return "f18"; case PhysicalReg::F19: return "f19";
|
||||
case PhysicalReg::F20: return "f20"; case PhysicalReg::F21: return "f21";
|
||||
case PhysicalReg::F22: return "f22"; case PhysicalReg::F23: return "f23";
|
||||
case PhysicalReg::F24: return "f24"; case PhysicalReg::F25: return "f25";
|
||||
case PhysicalReg::F26: return "f26"; case PhysicalReg::F27: return "f27";
|
||||
case PhysicalReg::F28: return "f28"; case PhysicalReg::F29: return "f29";
|
||||
case PhysicalReg::F30: return "f30"; case PhysicalReg::F31: return "f31";
|
||||
default: return "UNKNOWN_REG";
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace sysy
|
||||
File diff suppressed because it is too large
Load Diff
635
src/RISCv64ISel.cpp
Normal file
635
src/RISCv64ISel.cpp
Normal file
@ -0,0 +1,635 @@
|
||||
#include "RISCv64ISel.h"
|
||||
#include <stdexcept>
|
||||
#include <set>
|
||||
#include <functional>
|
||||
#include <cmath> // For std::fabs
|
||||
#include <limits> // For std::numeric_limits
|
||||
|
||||
namespace sysy {
|
||||
|
||||
// DAG节点定义 (内部实现)
|
||||
struct RISCv64ISel::DAGNode {
|
||||
enum NodeKind { CONSTANT, LOAD, STORE, BINARY, CALL, RETURN, BRANCH, ALLOCA_ADDR, UNARY, MEMSET };
|
||||
NodeKind kind;
|
||||
Value* value = nullptr;
|
||||
std::vector<DAGNode*> operands;
|
||||
std::vector<DAGNode*> users;
|
||||
DAGNode(NodeKind k) : kind(k) {}
|
||||
};
|
||||
|
||||
RISCv64ISel::RISCv64ISel() : vreg_counter(0), local_label_counter(0) {}
|
||||
|
||||
// 为一个IR Value获取或分配一个新的虚拟寄存器
|
||||
unsigned RISCv64ISel::getVReg(Value* val) {
|
||||
if (!val) {
|
||||
throw std::runtime_error("Cannot get vreg for a null Value.");
|
||||
}
|
||||
if (vreg_map.find(val) == vreg_map.end()) {
|
||||
if (vreg_counter == 0) {
|
||||
vreg_counter = 1; // vreg 0 保留
|
||||
}
|
||||
vreg_map[val] = vreg_counter++;
|
||||
}
|
||||
return vreg_map.at(val);
|
||||
}
|
||||
|
||||
// 主入口函数
|
||||
std::unique_ptr<MachineFunction> RISCv64ISel::runOnFunction(Function* func) {
|
||||
F = func;
|
||||
if (!F) return nullptr;
|
||||
MFunc = std::make_unique<MachineFunction>(F, this);
|
||||
vreg_map.clear();
|
||||
bb_map.clear();
|
||||
vreg_counter = 0;
|
||||
local_label_counter = 0;
|
||||
|
||||
select();
|
||||
|
||||
return std::move(MFunc);
|
||||
}
|
||||
|
||||
// 指令选择主流程
|
||||
void RISCv64ISel::select() {
|
||||
for (const auto& bb_ptr : F->getBasicBlocks()) {
|
||||
auto mbb = std::make_unique<MachineBasicBlock>(bb_ptr->getName(), MFunc.get());
|
||||
bb_map[bb_ptr.get()] = mbb.get();
|
||||
MFunc->addBlock(std::move(mbb));
|
||||
}
|
||||
|
||||
if (F->getEntryBlock()) {
|
||||
for (auto* arg_alloca : F->getEntryBlock()->getArguments()) {
|
||||
getVReg(arg_alloca);
|
||||
}
|
||||
}
|
||||
|
||||
for (const auto& bb_ptr : F->getBasicBlocks()) {
|
||||
selectBasicBlock(bb_ptr.get());
|
||||
}
|
||||
|
||||
for (const auto& bb_ptr : F->getBasicBlocks()) {
|
||||
CurMBB = bb_map.at(bb_ptr.get());
|
||||
for (auto succ : bb_ptr->getSuccessors()) {
|
||||
CurMBB->successors.push_back(bb_map.at(succ));
|
||||
}
|
||||
for (auto pred : bb_ptr->getPredecessors()) {
|
||||
CurMBB->predecessors.push_back(bb_map.at(pred));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// 处理单个基本块
|
||||
void RISCv64ISel::selectBasicBlock(BasicBlock* bb) {
|
||||
CurMBB = bb_map.at(bb);
|
||||
auto dag = build_dag(bb);
|
||||
|
||||
std::map<Value*, DAGNode*> value_to_node;
|
||||
for(const auto& node : dag) {
|
||||
if (node->value) {
|
||||
value_to_node[node->value] = node.get();
|
||||
}
|
||||
}
|
||||
|
||||
std::set<DAGNode*> selected_nodes;
|
||||
std::function<void(DAGNode*)> select_recursive =
|
||||
[&](DAGNode* node) {
|
||||
if (!node || selected_nodes.count(node)) return;
|
||||
for (auto operand : node->operands) {
|
||||
select_recursive(operand);
|
||||
}
|
||||
selectNode(node);
|
||||
selected_nodes.insert(node);
|
||||
};
|
||||
|
||||
for (const auto& inst_ptr : bb->getInstructions()) {
|
||||
DAGNode* node_to_select = nullptr;
|
||||
if (value_to_node.count(inst_ptr.get())) {
|
||||
node_to_select = value_to_node.at(inst_ptr.get());
|
||||
} else {
|
||||
for(const auto& node : dag) {
|
||||
if(node->value == inst_ptr.get()) {
|
||||
node_to_select = node.get();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
if(node_to_select) {
|
||||
select_recursive(node_to_select);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// 核心函数：为DAG节点选择并生成MachineInstr (忠实移植版)
|
||||
void RISCv64ISel::selectNode(DAGNode* node) {
|
||||
switch (node->kind) {
|
||||
case DAGNode::CONSTANT:
|
||||
case DAGNode::ALLOCA_ADDR:
|
||||
if (node->value) getVReg(node->value);
|
||||
break;
|
||||
|
||||
case DAGNode::LOAD: {
|
||||
auto dest_vreg = getVReg(node->value);
|
||||
Value* ptr_val = node->operands[0]->value;
|
||||
|
||||
if (auto alloca = dynamic_cast<AllocaInst*>(ptr_val)) {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::FRAME_LOAD);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(getVReg(alloca)));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
} else if (auto global = dynamic_cast<GlobalValue*>(ptr_val)) {
|
||||
auto addr_vreg = getNewVReg();
|
||||
auto la = std::make_unique<MachineInstr>(RVOpcodes::LA);
|
||||
la->addOperand(std::make_unique<RegOperand>(addr_vreg));
|
||||
la->addOperand(std::make_unique<LabelOperand>(global->getName()));
|
||||
CurMBB->addInstruction(std::move(la));
|
||||
|
||||
auto lw = std::make_unique<MachineInstr>(RVOpcodes::LW);
|
||||
lw->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
lw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(addr_vreg),
|
||||
std::make_unique<ImmOperand>(0)
|
||||
));
|
||||
CurMBB->addInstruction(std::move(lw));
|
||||
} else {
|
||||
auto ptr_vreg = getVReg(ptr_val);
|
||||
auto lw = std::make_unique<MachineInstr>(RVOpcodes::LW);
|
||||
lw->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
lw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(ptr_vreg),
|
||||
std::make_unique<ImmOperand>(0)
|
||||
));
|
||||
CurMBB->addInstruction(std::move(lw));
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::STORE: {
|
||||
Value* val_to_store = node->operands[0]->value;
|
||||
Value* ptr_val = node->operands[1]->value;
|
||||
|
||||
if (auto val_const = dynamic_cast<ConstantValue*>(val_to_store)) {
|
||||
auto li = std::make_unique<MachineInstr>(RVOpcodes::LI);
|
||||
li->addOperand(std::make_unique<RegOperand>(getVReg(val_const)));
|
||||
li->addOperand(std::make_unique<ImmOperand>(val_const->getInt()));
|
||||
CurMBB->addInstruction(std::move(li));
|
||||
}
|
||||
auto val_vreg = getVReg(val_to_store);
|
||||
|
||||
if (auto alloca = dynamic_cast<AllocaInst*>(ptr_val)) {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::FRAME_STORE);
|
||||
instr->addOperand(std::make_unique<RegOperand>(val_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(getVReg(alloca)));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
} else if (auto global = dynamic_cast<GlobalValue*>(ptr_val)) {
|
||||
auto addr_vreg = getNewVReg();
|
||||
auto la = std::make_unique<MachineInstr>(RVOpcodes::LA);
|
||||
la->addOperand(std::make_unique<RegOperand>(addr_vreg));
|
||||
la->addOperand(std::make_unique<LabelOperand>(global->getName()));
|
||||
CurMBB->addInstruction(std::move(la));
|
||||
|
||||
auto sw = std::make_unique<MachineInstr>(RVOpcodes::SW);
|
||||
sw->addOperand(std::make_unique<RegOperand>(val_vreg));
|
||||
sw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(addr_vreg),
|
||||
std::make_unique<ImmOperand>(0)
|
||||
));
|
||||
CurMBB->addInstruction(std::move(sw));
|
||||
} else {
|
||||
auto ptr_vreg = getVReg(ptr_val);
|
||||
auto sw = std::make_unique<MachineInstr>(RVOpcodes::SW);
|
||||
sw->addOperand(std::make_unique<RegOperand>(val_vreg));
|
||||
sw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(ptr_vreg),
|
||||
std::make_unique<ImmOperand>(0)
|
||||
));
|
||||
CurMBB->addInstruction(std::move(sw));
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::BINARY: {
|
||||
auto bin = dynamic_cast<BinaryInst*>(node->value);
|
||||
Value* lhs = bin->getLhs();
|
||||
Value* rhs = bin->getRhs();
|
||||
|
||||
auto load_val_if_const = [&](Value* val) {
|
||||
if (auto c = dynamic_cast<ConstantValue*>(val)) {
|
||||
auto li = std::make_unique<MachineInstr>(RVOpcodes::LI);
|
||||
li->addOperand(std::make_unique<RegOperand>(getVReg(c)));
|
||||
li->addOperand(std::make_unique<ImmOperand>(c->getInt()));
|
||||
CurMBB->addInstruction(std::move(li));
|
||||
}
|
||||
};
|
||||
load_val_if_const(lhs);
|
||||
load_val_if_const(rhs);
|
||||
|
||||
auto dest_vreg = getVReg(bin);
|
||||
auto lhs_vreg = getVReg(lhs);
|
||||
auto rhs_vreg = getVReg(rhs);
|
||||
|
||||
if (bin->getKind() == BinaryInst::kAdd) {
|
||||
if (auto rhs_const = dynamic_cast<ConstantValue*>(rhs)) {
|
||||
if (rhs_const->getInt() >= -2048 && rhs_const->getInt() < 2048) {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::ADDIW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<ImmOperand>(rhs_const->getInt()));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
switch (bin->getKind()) {
|
||||
case BinaryInst::kAdd: {
|
||||
RVOpcodes opcode = (lhs->getType()->isPointer() || rhs->getType()->isPointer()) ? RVOpcodes::ADD : RVOpcodes::ADDW;
|
||||
auto instr = std::make_unique<MachineInstr>(opcode);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kSub: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::SUBW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kMul: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::MULW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case Instruction::kDiv: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::DIVW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case Instruction::kRem: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::REMW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpEQ: {
|
||||
auto sub = std::make_unique<MachineInstr>(RVOpcodes::SUBW);
|
||||
sub->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
sub->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
sub->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(sub));
|
||||
|
||||
auto seqz = std::make_unique<MachineInstr>(RVOpcodes::SEQZ);
|
||||
seqz->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
seqz->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
CurMBB->addInstruction(std::move(seqz));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpNE: {
|
||||
auto sub = std::make_unique<MachineInstr>(RVOpcodes::SUBW);
|
||||
sub->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
sub->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
sub->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(sub));
|
||||
|
||||
auto snez = std::make_unique<MachineInstr>(RVOpcodes::SNEZ);
|
||||
snez->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
snez->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
CurMBB->addInstruction(std::move(snez));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpLT: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::SLT);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpGT: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::SLT);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpLE: {
|
||||
auto slt = std::make_unique<MachineInstr>(RVOpcodes::SLT);
|
||||
slt->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
slt->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
slt->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
CurMBB->addInstruction(std::move(slt));
|
||||
|
||||
auto xori = std::make_unique<MachineInstr>(RVOpcodes::XORI);
|
||||
xori->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
xori->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
xori->addOperand(std::make_unique<ImmOperand>(1));
|
||||
CurMBB->addInstruction(std::move(xori));
|
||||
break;
|
||||
}
|
||||
case BinaryInst::kICmpGE: {
|
||||
auto slt = std::make_unique<MachineInstr>(RVOpcodes::SLT);
|
||||
slt->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
slt->addOperand(std::make_unique<RegOperand>(lhs_vreg));
|
||||
slt->addOperand(std::make_unique<RegOperand>(rhs_vreg));
|
||||
CurMBB->addInstruction(std::move(slt));
|
||||
|
||||
auto xori = std::make_unique<MachineInstr>(RVOpcodes::XORI);
|
||||
xori->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
xori->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
xori->addOperand(std::make_unique<ImmOperand>(1));
|
||||
CurMBB->addInstruction(std::move(xori));
|
||||
break;
|
||||
}
|
||||
default:
|
||||
throw std::runtime_error("Unsupported binary instruction in ISel");
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::UNARY: {
|
||||
auto unary = dynamic_cast<UnaryInst*>(node->value);
|
||||
auto dest_vreg = getVReg(unary);
|
||||
auto src_vreg = getVReg(unary->getOperand());
|
||||
|
||||
switch (unary->getKind()) {
|
||||
case UnaryInst::kNeg: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::SUBW);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(PhysicalReg::ZERO));
|
||||
instr->addOperand(std::make_unique<RegOperand>(src_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
case UnaryInst::kNot: {
|
||||
auto instr = std::make_unique<MachineInstr>(RVOpcodes::SEQZ);
|
||||
instr->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
instr->addOperand(std::make_unique<RegOperand>(src_vreg));
|
||||
CurMBB->addInstruction(std::move(instr));
|
||||
break;
|
||||
}
|
||||
default:
|
||||
throw std::runtime_error("Unsupported unary instruction in ISel");
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::CALL: {
|
||||
auto call = dynamic_cast<CallInst*>(node->value);
|
||||
for (size_t i = 0; i < node->operands.size() && i < 8; ++i) {
|
||||
DAGNode* arg_node = node->operands[i];
|
||||
auto arg_preg = static_cast<PhysicalReg>(static_cast<int>(PhysicalReg::A0) + i);
|
||||
|
||||
if (arg_node->kind == DAGNode::CONSTANT) {
|
||||
if (auto const_val = dynamic_cast<ConstantValue*>(arg_node->value)) {
|
||||
auto li = std::make_unique<MachineInstr>(RVOpcodes::LI);
|
||||
li->addOperand(std::make_unique<RegOperand>(arg_preg));
|
||||
li->addOperand(std::make_unique<ImmOperand>(const_val->getInt()));
|
||||
CurMBB->addInstruction(std::move(li));
|
||||
}
|
||||
} else {
|
||||
auto src_vreg = getVReg(arg_node->value);
|
||||
auto mv = std::make_unique<MachineInstr>(RVOpcodes::MV);
|
||||
mv->addOperand(std::make_unique<RegOperand>(arg_preg));
|
||||
mv->addOperand(std::make_unique<RegOperand>(src_vreg));
|
||||
CurMBB->addInstruction(std::move(mv));
|
||||
}
|
||||
}
|
||||
|
||||
auto call_instr = std::make_unique<MachineInstr>(RVOpcodes::CALL);
|
||||
call_instr->addOperand(std::make_unique<LabelOperand>(call->getCallee()->getName()));
|
||||
CurMBB->addInstruction(std::move(call_instr));
|
||||
|
||||
if (!call->getType()->isVoid()) {
|
||||
auto mv_instr = std::make_unique<MachineInstr>(RVOpcodes::MV);
|
||||
mv_instr->addOperand(std::make_unique<RegOperand>(getVReg(call)));
|
||||
mv_instr->addOperand(std::make_unique<RegOperand>(PhysicalReg::A0));
|
||||
CurMBB->addInstruction(std::move(mv_instr));
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::RETURN: {
|
||||
auto ret_inst_ir = dynamic_cast<ReturnInst*>(node->value);
|
||||
if (ret_inst_ir && ret_inst_ir->hasReturnValue()) {
|
||||
Value* ret_val = ret_inst_ir->getReturnValue();
|
||||
if (auto const_val = dynamic_cast<ConstantValue*>(ret_val)) {
|
||||
auto li_instr = std::make_unique<MachineInstr>(RVOpcodes::LI);
|
||||
li_instr->addOperand(std::make_unique<RegOperand>(PhysicalReg::A0));
|
||||
li_instr->addOperand(std::make_unique<ImmOperand>(const_val->getInt()));
|
||||
CurMBB->addInstruction(std::move(li_instr));
|
||||
} else {
|
||||
auto mv_instr = std::make_unique<MachineInstr>(RVOpcodes::MV);
|
||||
mv_instr->addOperand(std::make_unique<RegOperand>(PhysicalReg::A0));
|
||||
mv_instr->addOperand(std::make_unique<RegOperand>(getVReg(ret_val)));
|
||||
CurMBB->addInstruction(std::move(mv_instr));
|
||||
}
|
||||
}
|
||||
auto ret_mi = std::make_unique<MachineInstr>(RVOpcodes::RET);
|
||||
CurMBB->addInstruction(std::move(ret_mi));
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::BRANCH: {
|
||||
if (auto cond_br = dynamic_cast<CondBrInst*>(node->value)) {
|
||||
auto br_instr = std::make_unique<MachineInstr>(RVOpcodes::BNE);
|
||||
br_instr->addOperand(std::make_unique<RegOperand>(getVReg(cond_br->getCondition())));
|
||||
br_instr->addOperand(std::make_unique<RegOperand>(PhysicalReg::ZERO));
|
||||
br_instr->addOperand(std::make_unique<LabelOperand>(cond_br->getThenBlock()->getName()));
|
||||
CurMBB->addInstruction(std::move(br_instr));
|
||||
} else if (auto uncond_br = dynamic_cast<UncondBrInst*>(node->value)) {
|
||||
auto j_instr = std::make_unique<MachineInstr>(RVOpcodes::J);
|
||||
j_instr->addOperand(std::make_unique<LabelOperand>(uncond_br->getBlock()->getName()));
|
||||
CurMBB->addInstruction(std::move(j_instr));
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case DAGNode::MEMSET: {
|
||||
auto memset = dynamic_cast<MemsetInst*>(node->value);
|
||||
auto r_dest_addr = getVReg(memset->getPointer());
|
||||
auto r_num_bytes = getVReg(memset->getSize());
|
||||
auto r_value_byte = getVReg(memset->getValue());
|
||||
auto r_counter = getNewVReg();
|
||||
auto r_end_addr = getNewVReg();
|
||||
auto r_current_addr = getNewVReg();
|
||||
auto r_temp_val = getNewVReg();
|
||||
|
||||
auto add_instr = [&](RVOpcodes op, unsigned rd, unsigned rs1, unsigned rs2) {
|
||||
auto i = std::make_unique<MachineInstr>(op);
|
||||
i->addOperand(std::make_unique<RegOperand>(rd));
|
||||
i->addOperand(std::make_unique<RegOperand>(rs1));
|
||||
i->addOperand(std::make_unique<RegOperand>(rs2));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
auto addi_instr = [&](RVOpcodes op, unsigned rd, unsigned rs1, int64_t imm) {
|
||||
auto i = std::make_unique<MachineInstr>(op);
|
||||
i->addOperand(std::make_unique<RegOperand>(rd));
|
||||
i->addOperand(std::make_unique<RegOperand>(rs1));
|
||||
i->addOperand(std::make_unique<ImmOperand>(imm));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
auto store_instr = [&](RVOpcodes op, unsigned src, unsigned base, int64_t off) {
|
||||
auto i = std::make_unique<MachineInstr>(op);
|
||||
i->addOperand(std::make_unique<RegOperand>(src));
|
||||
i->addOperand(std::make_unique<MemOperand>(std::make_unique<RegOperand>(base), std::make_unique<ImmOperand>(off)));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
auto branch_instr = [&](RVOpcodes op, unsigned rs1, unsigned rs2, const std::string& label) {
|
||||
auto i = std::make_unique<MachineInstr>(op);
|
||||
i->addOperand(std::make_unique<RegOperand>(rs1));
|
||||
i->addOperand(std::make_unique<RegOperand>(rs2));
|
||||
i->addOperand(std::make_unique<LabelOperand>(label));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
auto jump_instr = [&](const std::string& label) {
|
||||
auto i = std::make_unique<MachineInstr>(RVOpcodes::J);
|
||||
i->addOperand(std::make_unique<LabelOperand>(label));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
auto label_instr = [&](const std::string& name) {
|
||||
auto i = std::make_unique<MachineInstr>(RVOpcodes::LABEL);
|
||||
i->addOperand(std::make_unique<LabelOperand>(name));
|
||||
CurMBB->addInstruction(std::move(i));
|
||||
};
|
||||
|
||||
int unique_id = this->local_label_counter++;
|
||||
std::string loop_start_label = MFunc->getName() + "_memset_loop_start_" + std::to_string(unique_id);
|
||||
std::string loop_end_label = MFunc->getName() + "_memset_loop_end_" + std::to_string(unique_id);
|
||||
std::string remainder_label = MFunc->getName() + "_memset_remainder_" + std::to_string(unique_id);
|
||||
std::string done_label = MFunc->getName() + "_memset_done_" + std::to_string(unique_id);
|
||||
|
||||
addi_instr(RVOpcodes::ANDI, r_temp_val, r_value_byte, 255);
|
||||
addi_instr(RVOpcodes::SLLI, r_value_byte, r_temp_val, 8);
|
||||
add_instr(RVOpcodes::OR, r_temp_val, r_temp_val, r_value_byte);
|
||||
addi_instr(RVOpcodes::SLLI, r_value_byte, r_temp_val, 16);
|
||||
add_instr(RVOpcodes::OR, r_temp_val, r_temp_val, r_value_byte);
|
||||
addi_instr(RVOpcodes::SLLI, r_value_byte, r_temp_val, 32);
|
||||
add_instr(RVOpcodes::OR, r_temp_val, r_temp_val, r_value_byte);
|
||||
add_instr(RVOpcodes::ADD, r_end_addr, r_dest_addr, r_num_bytes);
|
||||
auto mv = std::make_unique<MachineInstr>(RVOpcodes::MV);
|
||||
mv->addOperand(std::make_unique<RegOperand>(r_current_addr));
|
||||
mv->addOperand(std::make_unique<RegOperand>(r_dest_addr));
|
||||
CurMBB->addInstruction(std::move(mv));
|
||||
addi_instr(RVOpcodes::ANDI, r_counter, r_num_bytes, -8);
|
||||
add_instr(RVOpcodes::ADD, r_counter, r_dest_addr, r_counter);
|
||||
label_instr(loop_start_label);
|
||||
branch_instr(RVOpcodes::BGEU, r_current_addr, r_counter, loop_end_label);
|
||||
store_instr(RVOpcodes::SD, r_temp_val, r_current_addr, 0);
|
||||
addi_instr(RVOpcodes::ADDI, r_current_addr, r_current_addr, 8);
|
||||
jump_instr(loop_start_label);
|
||||
label_instr(loop_end_label);
|
||||
label_instr(remainder_label);
|
||||
branch_instr(RVOpcodes::BGEU, r_current_addr, r_end_addr, done_label);
|
||||
store_instr(RVOpcodes::SB, r_temp_val, r_current_addr, 0);
|
||||
addi_instr(RVOpcodes::ADDI, r_current_addr, r_current_addr, 1);
|
||||
jump_instr(remainder_label);
|
||||
label_instr(done_label);
|
||||
break;
|
||||
}
|
||||
|
||||
default:
|
||||
throw std::runtime_error("Unsupported DAGNode kind in ISel");
|
||||
}
|
||||
}
|
||||
|
||||
// 以下是忠实移植的DAG构建函数
|
||||
RISCv64ISel::DAGNode* RISCv64ISel::create_node(int kind_int, Value* val, std::map<Value*, DAGNode*>& value_to_node, std::vector<std::unique_ptr<DAGNode>>& nodes_storage) {
|
||||
auto kind = static_cast<DAGNode::NodeKind>(kind_int);
|
||||
if (val && value_to_node.count(val) && kind != DAGNode::STORE && kind != DAGNode::RETURN && kind != DAGNode::BRANCH && kind != DAGNode::MEMSET) {
|
||||
return value_to_node[val];
|
||||
}
|
||||
auto node = std::make_unique<DAGNode>(kind);
|
||||
node->value = val;
|
||||
DAGNode* raw_node_ptr = node.get();
|
||||
nodes_storage.push_back(std::move(node));
|
||||
if (val && !val->getType()->isVoid() && (dynamic_cast<Instruction*>(val) || dynamic_cast<GlobalValue*>(val))) {
|
||||
value_to_node[val] = raw_node_ptr;
|
||||
}
|
||||
return raw_node_ptr;
|
||||
}
|
||||
|
||||
RISCv64ISel::DAGNode* RISCv64ISel::get_operand_node(Value* val_ir, std::map<Value*, DAGNode*>& value_to_node, std::vector<std::unique_ptr<DAGNode>>& nodes_storage) {
|
||||
if (value_to_node.count(val_ir)) {
|
||||
return value_to_node[val_ir];
|
||||
} else if (dynamic_cast<ConstantValue*>(val_ir)) {
|
||||
return create_node(DAGNode::CONSTANT, val_ir, value_to_node, nodes_storage);
|
||||
} else if (dynamic_cast<GlobalValue*>(val_ir)) {
|
||||
return create_node(DAGNode::CONSTANT, val_ir, value_to_node, nodes_storage);
|
||||
} else if (dynamic_cast<AllocaInst*>(val_ir)) {
|
||||
return create_node(DAGNode::ALLOCA_ADDR, val_ir, value_to_node, nodes_storage);
|
||||
}
|
||||
return create_node(DAGNode::LOAD, val_ir, value_to_node, nodes_storage);
|
||||
}
|
||||
|
||||
std::vector<std::unique_ptr<RISCv64ISel::DAGNode>> RISCv64ISel::build_dag(BasicBlock* bb) {
|
||||
std::vector<std::unique_ptr<DAGNode>> nodes_storage;
|
||||
std::map<Value*, DAGNode*> value_to_node;
|
||||
|
||||
for (const auto& inst_ptr : bb->getInstructions()) {
|
||||
Instruction* inst = inst_ptr.get();
|
||||
if (auto alloca = dynamic_cast<AllocaInst*>(inst)) {
|
||||
create_node(DAGNode::ALLOCA_ADDR, alloca, value_to_node, nodes_storage);
|
||||
} else if (auto store = dynamic_cast<StoreInst*>(inst)) {
|
||||
auto store_node = create_node(DAGNode::STORE, store, value_to_node, nodes_storage);
|
||||
store_node->operands.push_back(get_operand_node(store->getValue(), value_to_node, nodes_storage));
|
||||
store_node->operands.push_back(get_operand_node(store->getPointer(), value_to_node, nodes_storage));
|
||||
} else if (auto memset = dynamic_cast<MemsetInst*>(inst)) {
|
||||
auto memset_node = create_node(DAGNode::MEMSET, memset, value_to_node, nodes_storage);
|
||||
memset_node->operands.push_back(get_operand_node(memset->getPointer(), value_to_node, nodes_storage));
|
||||
memset_node->operands.push_back(get_operand_node(memset->getBegin(), value_to_node, nodes_storage));
|
||||
memset_node->operands.push_back(get_operand_node(memset->getSize(), value_to_node, nodes_storage));
|
||||
memset_node->operands.push_back(get_operand_node(memset->getValue(), value_to_node, nodes_storage));
|
||||
} else if (auto load = dynamic_cast<LoadInst*>(inst)) {
|
||||
auto load_node = create_node(DAGNode::LOAD, load, value_to_node, nodes_storage);
|
||||
load_node->operands.push_back(get_operand_node(load->getPointer(), value_to_node, nodes_storage));
|
||||
} else if (auto bin = dynamic_cast<BinaryInst*>(inst)) {
|
||||
if(value_to_node.count(bin)) continue;
|
||||
if (bin->getKind() == BinaryInst::kSub) {
|
||||
if (auto const_lhs = dynamic_cast<ConstantValue*>(bin->getLhs())) {
|
||||
if (const_lhs->getInt() == 0) {
|
||||
auto unary_node = create_node(DAGNode::UNARY, bin, value_to_node, nodes_storage);
|
||||
unary_node->operands.push_back(get_operand_node(bin->getRhs(), value_to_node, nodes_storage));
|
||||
continue;
|
||||
}
|
||||
}
|
||||
}
|
||||
auto bin_node = create_node(DAGNode::BINARY, bin, value_to_node, nodes_storage);
|
||||
bin_node->operands.push_back(get_operand_node(bin->getLhs(), value_to_node, nodes_storage));
|
||||
bin_node->operands.push_back(get_operand_node(bin->getRhs(), value_to_node, nodes_storage));
|
||||
} else if (auto un = dynamic_cast<UnaryInst*>(inst)) {
|
||||
if(value_to_node.count(un)) continue;
|
||||
auto unary_node = create_node(DAGNode::UNARY, un, value_to_node, nodes_storage);
|
||||
unary_node->operands.push_back(get_operand_node(un->getOperand(), value_to_node, nodes_storage));
|
||||
} else if (auto call = dynamic_cast<CallInst*>(inst)) {
|
||||
if(value_to_node.count(call)) continue;
|
||||
auto call_node = create_node(DAGNode::CALL, call, value_to_node, nodes_storage);
|
||||
for (auto arg : call->getArguments()) {
|
||||
call_node->operands.push_back(get_operand_node(arg->getValue(), value_to_node, nodes_storage));
|
||||
}
|
||||
} else if (auto ret = dynamic_cast<ReturnInst*>(inst)) {
|
||||
auto ret_node = create_node(DAGNode::RETURN, ret, value_to_node, nodes_storage);
|
||||
if (ret->hasReturnValue()) {
|
||||
ret_node->operands.push_back(get_operand_node(ret->getReturnValue(), value_to_node, nodes_storage));
|
||||
}
|
||||
} else if (auto cond_br = dynamic_cast<CondBrInst*>(inst)) {
|
||||
auto br_node = create_node(DAGNode::BRANCH, cond_br, value_to_node, nodes_storage);
|
||||
br_node->operands.push_back(get_operand_node(cond_br->getCondition(), value_to_node, nodes_storage));
|
||||
} else if (auto uncond_br = dynamic_cast<UncondBrInst*>(inst)) {
|
||||
create_node(DAGNode::BRANCH, uncond_br, value_to_node, nodes_storage);
|
||||
}
|
||||
}
|
||||
return nodes_storage;
|
||||
}
|
||||
|
||||
} // namespace sysy
|
||||
54
src/RISCv64Passes.cpp
Normal file
54
src/RISCv64Passes.cpp
Normal file
@ -0,0 +1,54 @@
|
||||
#include "RISCv64Passes.h"
|
||||
#include <iostream>
|
||||
|
||||
namespace sysy {
|
||||
|
||||
// --- 寄存器分配前优化 ---
|
||||
|
||||
void PreRA_Scheduler::runOnMachineFunction(MachineFunction* mfunc) {
|
||||
// TODO: 在此实现寄存器分配前的指令调度。
|
||||
// 遍历mfunc中的每一个MachineBasicBlock。
|
||||
// 对每个基本块内的MachineInstr列表进行重排。
|
||||
//
|
||||
// 实现思路:
|
||||
// 1. 分析每个基本块内指令的数据依赖关系，构建依赖图(DAG)。
|
||||
// 2. 根据目标处理器的流水线特性（指令延迟等），使用列表调度等算法对指令进行重排。
|
||||
// 3. 此时操作的是虚拟寄存器，只存在真依赖，调度自由度最大。
|
||||
//
|
||||
// std::cout << "Running Pre-RA Instruction Scheduler..." << std::endl;
|
||||
}
|
||||
|
||||
|
||||
// --- 寄存器分配后优化 ---
|
||||
|
||||
void PeepholeOptimizer::runOnMachineFunction(MachineFunction* mfunc) {
|
||||
// TODO: 在此实现窥孔优化。
|
||||
// 遍历mfunc中的每一个MachineBasicBlock。
|
||||
// 对每个基本块内的MachineInstr列表进行扫描和替换。
|
||||
//
|
||||
// 实现思路:
|
||||
// 1. 维护一个大小固定（例如3-5条指令）的滑动窗口。
|
||||
// 2. 识别特定的冗余模式，例如:
|
||||
// - `mv a0, a1` 后紧跟 `mv a1, a0` (可消除的交换)
|
||||
// - `sw t0, 12(s0)` 后紧跟 `lw t1, 12(s0)` (冗余加载)
|
||||
// - 强度削减: `mul x, x, 2` -> `slli x, x, 1`
|
||||
// 3. 识别后，直接修改MachineInstr列表（删除、替换或插入指令）。
|
||||
//
|
||||
// std::cout << "Running Post-RA Peephole Optimizer..." << std::endl;
|
||||
}
|
||||
|
||||
void PostRA_Scheduler::runOnMachineFunction(MachineFunction* mfunc) {
|
||||
// TODO: 在此实现寄存器分配后的局部指令调度。
|
||||
// 遍历mfunc中的每一个MachineBasicBlock。
|
||||
// 重点关注由寄存器分配器插入的spill/fill代码。
|
||||
//
|
||||
// 实现思路:
|
||||
// 1. 识别出用于spill/fill的lw/sw指令。
|
||||
// 2. 在不违反数据依赖（包括物理寄存器引入的伪依赖）的前提下，
|
||||
// 尝试将lw指令向上移动，使其与使用它的指令之间有足够的距离，以隐藏访存延迟。
|
||||
// 3. 同样，可以尝试将sw指令向下移动。
|
||||
//
|
||||
// std::cout << "Running Post-RA Local Scheduler..." << std::endl;
|
||||
}
|
||||
|
||||
} // namespace sysy
|
||||
322
src/RISCv64RegAlloc.cpp
Normal file
322
src/RISCv64RegAlloc.cpp
Normal file
@ -0,0 +1,322 @@
|
||||
#include "RISCv64RegAlloc.h"
|
||||
#include "RISCv64ISel.h"
|
||||
#include <algorithm>
|
||||
#include <vector>
|
||||
|
||||
namespace sysy {
|
||||
|
||||
RISCv64RegAlloc::RISCv64RegAlloc(MachineFunction* mfunc) : MFunc(mfunc) {
|
||||
allocable_int_regs = {
|
||||
PhysicalReg::T0, PhysicalReg::T1, PhysicalReg::T2, PhysicalReg::T3,
|
||||
PhysicalReg::T4, PhysicalReg::T5, PhysicalReg::T6,
|
||||
PhysicalReg::A0, PhysicalReg::A1, PhysicalReg::A2, PhysicalReg::A3,
|
||||
PhysicalReg::A4, PhysicalReg::A5, PhysicalReg::A6, PhysicalReg::A7,
|
||||
PhysicalReg::S0, PhysicalReg::S1, PhysicalReg::S2, PhysicalReg::S3,
|
||||
PhysicalReg::S4, PhysicalReg::S5, PhysicalReg::S6, PhysicalReg::S7,
|
||||
PhysicalReg::S8, PhysicalReg::S9, PhysicalReg::S10, PhysicalReg::S11,
|
||||
};
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::run() {
|
||||
eliminateFrameIndices();
|
||||
analyzeLiveness();
|
||||
buildInterferenceGraph();
|
||||
colorGraph();
|
||||
rewriteFunction();
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::eliminateFrameIndices() {
|
||||
StackFrameInfo& frame_info = MFunc->getFrameInfo();
|
||||
int current_offset = 0;
|
||||
Function* F = MFunc->getFunc();
|
||||
RISCv64ISel* isel = MFunc->getISel();
|
||||
|
||||
for (auto& bb : F->getBasicBlocks()) {
|
||||
for (auto& inst : bb->getInstructions()) {
|
||||
if (auto alloca = dynamic_cast<AllocaInst*>(inst.get())) {
|
||||
int size = 4;
|
||||
if (!alloca->getDims().empty()) {
|
||||
int num_elements = 1;
|
||||
for (const auto& dim_use : alloca->getDims()) {
|
||||
if (auto const_dim = dynamic_cast<ConstantValue*>(dim_use->getValue())) {
|
||||
num_elements *= const_dim->getInt();
|
||||
}
|
||||
}
|
||||
size *= num_elements;
|
||||
}
|
||||
current_offset += size;
|
||||
unsigned alloca_vreg = isel->getVReg(alloca);
|
||||
frame_info.alloca_offsets[alloca_vreg] = -current_offset;
|
||||
}
|
||||
}
|
||||
}
|
||||
frame_info.locals_size = current_offset;
|
||||
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
std::vector<std::unique_ptr<MachineInstr>> new_instructions;
|
||||
for (auto& instr_ptr : mbb->getInstructions()) {
|
||||
if (instr_ptr->getOpcode() == RVOpcodes::FRAME_LOAD) {
|
||||
auto& operands = instr_ptr->getOperands();
|
||||
unsigned dest_vreg = static_cast<RegOperand*>(operands[0].get())->getVRegNum();
|
||||
unsigned alloca_vreg = static_cast<RegOperand*>(operands[1].get())->getVRegNum();
|
||||
int offset = frame_info.alloca_offsets.at(alloca_vreg);
|
||||
auto addr_vreg = isel->getNewVReg();
|
||||
|
||||
auto addi = std::make_unique<MachineInstr>(RVOpcodes::ADDI);
|
||||
addi->addOperand(std::make_unique<RegOperand>(addr_vreg));
|
||||
addi->addOperand(std::make_unique<RegOperand>(PhysicalReg::S0));
|
||||
addi->addOperand(std::make_unique<ImmOperand>(offset));
|
||||
new_instructions.push_back(std::move(addi));
|
||||
|
||||
auto lw = std::make_unique<MachineInstr>(RVOpcodes::LW);
|
||||
lw->addOperand(std::make_unique<RegOperand>(dest_vreg));
|
||||
lw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(addr_vreg),
|
||||
std::make_unique<ImmOperand>(0)));
|
||||
new_instructions.push_back(std::move(lw));
|
||||
|
||||
} else if (instr_ptr->getOpcode() == RVOpcodes::FRAME_STORE) {
|
||||
auto& operands = instr_ptr->getOperands();
|
||||
unsigned src_vreg = static_cast<RegOperand*>(operands[0].get())->getVRegNum();
|
||||
unsigned alloca_vreg = static_cast<RegOperand*>(operands[1].get())->getVRegNum();
|
||||
int offset = frame_info.alloca_offsets.at(alloca_vreg);
|
||||
auto addr_vreg = isel->getNewVReg();
|
||||
|
||||
auto addi = std::make_unique<MachineInstr>(RVOpcodes::ADDI);
|
||||
addi->addOperand(std::make_unique<RegOperand>(addr_vreg));
|
||||
addi->addOperand(std::make_unique<RegOperand>(PhysicalReg::S0));
|
||||
addi->addOperand(std::make_unique<ImmOperand>(offset));
|
||||
new_instructions.push_back(std::move(addi));
|
||||
|
||||
auto sw = std::make_unique<MachineInstr>(RVOpcodes::SW);
|
||||
sw->addOperand(std::make_unique<RegOperand>(src_vreg));
|
||||
sw->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(addr_vreg),
|
||||
std::make_unique<ImmOperand>(0)));
|
||||
new_instructions.push_back(std::move(sw));
|
||||
} else {
|
||||
new_instructions.push_back(std::move(instr_ptr));
|
||||
}
|
||||
}
|
||||
mbb->getInstructions() = std::move(new_instructions);
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::getInstrUseDef(MachineInstr* instr, LiveSet& use, LiveSet& def) {
|
||||
bool is_def = true;
|
||||
auto opcode = instr->getOpcode();
|
||||
|
||||
// 预定义def和use规则
|
||||
if (opcode == RVOpcodes::SW || opcode == RVOpcodes::SD ||
|
||||
opcode == RVOpcodes::BEQ || opcode == RVOpcodes::BNE ||
|
||||
opcode == RVOpcodes::BLT || opcode == RVOpcodes::BGE ||
|
||||
opcode == RVOpcodes::RET || opcode == RVOpcodes::J) {
|
||||
is_def = false;
|
||||
}
|
||||
if (opcode == RVOpcodes::CALL) {
|
||||
// CALL会杀死所有调用者保存寄存器，这是一个简化处理
|
||||
// 同时也使用了传入a0-a7的参数
|
||||
}
|
||||
|
||||
for (const auto& op : instr->getOperands()) {
|
||||
if (op->getKind() == MachineOperand::KIND_REG) {
|
||||
auto reg_op = static_cast<RegOperand*>(op.get());
|
||||
if (reg_op->isVirtual()) {
|
||||
if (is_def) {
|
||||
def.insert(reg_op->getVRegNum());
|
||||
is_def = false;
|
||||
} else {
|
||||
use.insert(reg_op->getVRegNum());
|
||||
}
|
||||
}
|
||||
} else if (op->getKind() == MachineOperand::KIND_MEM) {
|
||||
auto mem_op = static_cast<MemOperand*>(op.get());
|
||||
if (mem_op->getBase()->isVirtual()) {
|
||||
use.insert(mem_op->getBase()->getVRegNum());
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::analyzeLiveness() {
|
||||
bool changed = true;
|
||||
while (changed) {
|
||||
changed = false;
|
||||
for (auto it = MFunc->getBlocks().rbegin(); it != MFunc->getBlocks().rend(); ++it) {
|
||||
auto& mbb = *it;
|
||||
LiveSet live_out;
|
||||
for (auto succ : mbb->successors) {
|
||||
if (!succ->getInstructions().empty()) {
|
||||
auto first_instr = succ->getInstructions().front().get();
|
||||
if (live_in_map.count(first_instr)) {
|
||||
live_out.insert(live_in_map.at(first_instr).begin(), live_in_map.at(first_instr).end());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (auto instr_it = mbb->getInstructions().rbegin(); instr_it != mbb->getInstructions().rend(); ++instr_it) {
|
||||
MachineInstr* instr = instr_it->get();
|
||||
LiveSet old_live_in = live_in_map[instr];
|
||||
live_out_map[instr] = live_out;
|
||||
|
||||
LiveSet use, def;
|
||||
getInstrUseDef(instr, use, def);
|
||||
|
||||
LiveSet live_in = use;
|
||||
LiveSet diff = live_out;
|
||||
for (auto vreg : def) {
|
||||
diff.erase(vreg);
|
||||
}
|
||||
live_in.insert(diff.begin(), diff.end());
|
||||
live_in_map[instr] = live_in;
|
||||
|
||||
live_out = live_in;
|
||||
|
||||
if (live_in_map[instr] != old_live_in) {
|
||||
changed = true;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::buildInterferenceGraph() {
|
||||
std::set<unsigned> all_vregs;
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
for(auto& instr : mbb->getInstructions()) {
|
||||
LiveSet use, def;
|
||||
getInstrUseDef(instr.get(), use, def);
|
||||
for(auto u : use) all_vregs.insert(u);
|
||||
for(auto d : def) all_vregs.insert(d);
|
||||
}
|
||||
}
|
||||
|
||||
for (auto vreg : all_vregs) { interference_graph[vreg] = {}; }
|
||||
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
for (auto& instr : mbb->getInstructions()) {
|
||||
LiveSet def, use;
|
||||
getInstrUseDef(instr.get(), use, def);
|
||||
const LiveSet& live_out = live_out_map.at(instr.get());
|
||||
|
||||
for (unsigned d : def) {
|
||||
for (unsigned l : live_out) {
|
||||
if (d != l) {
|
||||
interference_graph[d].insert(l);
|
||||
interference_graph[l].insert(d);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::colorGraph() {
|
||||
std::vector<unsigned> sorted_vregs;
|
||||
for (auto const& [vreg, neighbors] : interference_graph) {
|
||||
sorted_vregs.push_back(vreg);
|
||||
}
|
||||
|
||||
std::sort(sorted_vregs.begin(), sorted_vregs.end(), [&](unsigned a, unsigned b) {
|
||||
return interference_graph[a].size() > interference_graph[b].size();
|
||||
});
|
||||
|
||||
for (unsigned vreg : sorted_vregs) {
|
||||
std::set<PhysicalReg> used_colors;
|
||||
for (unsigned neighbor : interference_graph.at(vreg)) {
|
||||
if (color_map.count(neighbor)) {
|
||||
used_colors.insert(color_map.at(neighbor));
|
||||
}
|
||||
}
|
||||
|
||||
bool colored = false;
|
||||
for (PhysicalReg preg : allocable_int_regs) {
|
||||
if (used_colors.find(preg) == used_colors.end()) {
|
||||
color_map[vreg] = preg;
|
||||
colored = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (!colored) {
|
||||
spilled_vregs.insert(vreg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void RISCv64RegAlloc::rewriteFunction() {
|
||||
StackFrameInfo& frame_info = MFunc->getFrameInfo();
|
||||
int current_offset = frame_info.locals_size;
|
||||
for (unsigned vreg : spilled_vregs) {
|
||||
current_offset += 4;
|
||||
frame_info.spill_offsets[vreg] = -current_offset;
|
||||
}
|
||||
frame_info.spill_size = current_offset - frame_info.locals_size;
|
||||
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
std::vector<std::unique_ptr<MachineInstr>> new_instructions;
|
||||
for (auto& instr_ptr : mbb->getInstructions()) {
|
||||
LiveSet use, def;
|
||||
getInstrUseDef(instr_ptr.get(), use, def);
|
||||
|
||||
for (unsigned vreg : use) {
|
||||
if (spilled_vregs.count(vreg)) {
|
||||
int offset = frame_info.spill_offsets.at(vreg);
|
||||
auto load = std::make_unique<MachineInstr>(RVOpcodes::LW);
|
||||
load->addOperand(std::make_unique<RegOperand>(vreg));
|
||||
load->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(PhysicalReg::S0),
|
||||
std::make_unique<ImmOperand>(offset)
|
||||
));
|
||||
new_instructions.push_back(std::move(load));
|
||||
}
|
||||
}
|
||||
|
||||
new_instructions.push_back(std::move(instr_ptr));
|
||||
|
||||
for (unsigned vreg : def) {
|
||||
if (spilled_vregs.count(vreg)) {
|
||||
int offset = frame_info.spill_offsets.at(vreg);
|
||||
auto store = std::make_unique<MachineInstr>(RVOpcodes::SW);
|
||||
store->addOperand(std::make_unique<RegOperand>(vreg));
|
||||
store->addOperand(std::make_unique<MemOperand>(
|
||||
std::make_unique<RegOperand>(PhysicalReg::S0),
|
||||
std::make_unique<ImmOperand>(offset)
|
||||
));
|
||||
new_instructions.push_back(std::move(store));
|
||||
}
|
||||
}
|
||||
}
|
||||
mbb->getInstructions() = std::move(new_instructions);
|
||||
}
|
||||
|
||||
for (auto& mbb : MFunc->getBlocks()) {
|
||||
for (auto& instr_ptr : mbb->getInstructions()) {
|
||||
for (auto& op_ptr : instr_ptr->getOperands()) {
|
||||
if(op_ptr->getKind() == MachineOperand::KIND_REG) {
|
||||
auto reg_op = static_cast<RegOperand*>(op_ptr.get());
|
||||
if (reg_op->isVirtual()) {
|
||||
unsigned vreg = reg_op->getVRegNum();
|
||||
if (color_map.count(vreg)) {
|
||||
reg_op->setPReg(color_map.at(vreg));
|
||||
} else if (spilled_vregs.count(vreg)) {
|
||||
reg_op->setPReg(PhysicalReg::T6); // 溢出统一用t6
|
||||
}
|
||||
}
|
||||
} else if (op_ptr->getKind() == MachineOperand::KIND_MEM) {
|
||||
auto mem_op = static_cast<MemOperand*>(op_ptr.get());
|
||||
auto base_reg_op = mem_op->getBase();
|
||||
if(base_reg_op->isVirtual()){
|
||||
unsigned vreg = base_reg_op->getVRegNum();
|
||||
if(color_map.count(vreg)) {
|
||||
base_reg_op->setPReg(color_map.at(vreg));
|
||||
} else if (spilled_vregs.count(vreg)) {
|
||||
base_reg_op->setPReg(PhysicalReg::T6);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace sysy
|
||||
59
src/include/AddressCalculationExpansion.h
Normal file
59
src/include/AddressCalculationExpansion.h
Normal file
@ -0,0 +1,59 @@
|
||||
#pragma once
|
||||
|
||||
#include "IR.h" // 假设IR.h包含了Module, Function, BasicBlock, Instruction, Value, IRBuilder, Type等定义
|
||||
#include "IRBuilder.h" // 需要IRBuilder来创建新指令
|
||||
#include "SysYIRPrinter.h" // 新增: 用于调试输出
|
||||
#include <memory>
|
||||
#include <string>
|
||||
#include <unordered_map>
|
||||
#include <vector>
|
||||
#include <list> // 用于迭代和修改指令列表
|
||||
#include <algorithm> // for std::reverse (if needed, although not used in final version)
|
||||
#include <iostream> // MODIFICATION: 用于警告输出
|
||||
|
||||
namespace sysy {
|
||||
|
||||
/**
|
||||
* @brief AddressCalculationExpansion Pass
|
||||
*
|
||||
* 这是一个IR优化Pass，用于将LoadInst和StoreInst中包含的多维数组索引
|
||||
* 显式地转换为IR中的BinaryInst（乘法和加法）序列，并生成带有线性偏移量的
|
||||
* LoadInst/StoreInst。
|
||||
*
|
||||
* 目的：确保在寄存器分配之前，所有中间地址计算的结果都有明确的IR指令和对应的虚拟寄存器，
|
||||
* 从而避免在后端DAG构建时临时创建值而导致寄存器分配缺失的问题。
|
||||
*
|
||||
* SysY语言特性：
|
||||
* - 无指针类型（所有数组访问的基地址是alloca或global的AllocaType/ArrayType）
|
||||
* - 数据类型只有int和float，且都占用4字节。
|
||||
* - LoadInst和StoreInst直接接受多个索引作为额外操作数。
|
||||
*/
|
||||
class AddressCalculationExpansion {
|
||||
private:
|
||||
Module* pModule;
|
||||
IRBuilder* pBuilder; // 用于在IR中插入新指令
|
||||
|
||||
// 数组元素的固定大小，根据SysY特性，int和float都是4字节
|
||||
static const int ELEMENT_SIZE = 4;
|
||||
|
||||
// 辅助函数：根据数组的维度信息和当前索引的维度，计算该索引的步长（字节数）
|
||||
// dims: 包含所有维度大小的vector，例如 {2, 3, 4}
|
||||
// currentDimIndex: 当前正在处理的索引在 dims 中的位置 (0, 1, 2...)
|
||||
int calculateStride(const std::vector<int>& dims, size_t currentDimIndex) {
|
||||
int stride = ELEMENT_SIZE; // 最内层元素大小 (4字节)
|
||||
// 乘以当前维度之后的所有维度的大小
|
||||
for (size_t i = currentDimIndex + 1; i < dims.size(); ++i) {
|
||||
stride *= dims[i];
|
||||
}
|
||||
return stride;
|
||||
}
|
||||
|
||||
public:
|
||||
AddressCalculationExpansion(Module* module, IRBuilder* builder)
|
||||
: pModule(module), pBuilder(builder) {}
|
||||
|
||||
// 运行此Pass
|
||||
bool run();
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
32
src/include/RISCv64AsmPrinter.h
Normal file
32
src/include/RISCv64AsmPrinter.h
Normal file
@ -0,0 +1,32 @@
|
||||
#ifndef RISCV64_ASMPRINTER_H
|
||||
#define RISCV64_ASMPRINTER_H
|
||||
|
||||
#include "RISCv64LLIR.h"
|
||||
#include <iostream>
|
||||
|
||||
namespace sysy {
|
||||
|
||||
class RISCv64AsmPrinter {
|
||||
public:
|
||||
RISCv64AsmPrinter(MachineFunction* mfunc);
|
||||
// 主入口
|
||||
void run(std::ostream& os);
|
||||
|
||||
private:
|
||||
// 打印各个部分
|
||||
void printPrologue();
|
||||
void printEpilogue();
|
||||
void printBasicBlock(MachineBasicBlock* mbb);
|
||||
void printInstruction(MachineInstr* instr);
|
||||
|
||||
// 辅助函数
|
||||
std::string regToString(PhysicalReg reg);
|
||||
void printOperand(MachineOperand* op);
|
||||
|
||||
MachineFunction* MFunc;
|
||||
std::ostream* OS;
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
#endif // RISCV64_ASMPRINTER_H
|
||||
@ -3,118 +3,23 @@
|
||||
|
||||
#include "IR.h"
|
||||
#include <string>
|
||||
#include <vector>
|
||||
#include <map>
|
||||
#include <set>
|
||||
#include <memory>
|
||||
#include <iostream>
|
||||
#include <functional> // For std::function
|
||||
|
||||
extern int DEBUG;
|
||||
extern int DEEPDEBUG;
|
||||
|
||||
namespace sysy {
|
||||
|
||||
// RISCv64CodeGen 现在是一个高层驱动器
|
||||
class RISCv64CodeGen {
|
||||
public:
|
||||
enum class PhysicalReg {
|
||||
ZERO, RA, SP, GP, TP, T0, T1, T2, S0, S1, A0, A1, A2, A3, A4, A5, A6, A7, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, T3, T4, T5, T6,
|
||||
F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15,F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, F31
|
||||
};
|
||||
|
||||
// Move DAGNode and RegAllocResult to public section
|
||||
struct DAGNode {
|
||||
enum NodeKind { CONSTANT, LOAD, STORE, BINARY, CALL, RETURN, BRANCH, ALLOCA_ADDR, UNARY };
|
||||
NodeKind kind;
|
||||
Value* value = nullptr; // For IR Value
|
||||
std::string inst; // Generated RISC-V instruction(s) for this node
|
||||
std::string result_vreg; // Virtual register assigned to this node's result
|
||||
std::vector<DAGNode*> operands;
|
||||
std::vector<DAGNode*> users; // For debugging and potentially optimizations
|
||||
DAGNode(NodeKind k) : kind(k) {}
|
||||
|
||||
// Debugging / helper
|
||||
std::string getNodeKindString() const {
|
||||
switch (kind) {
|
||||
case CONSTANT: return "CONSTANT";
|
||||
case LOAD: return "LOAD";
|
||||
case STORE: return "STORE";
|
||||
case BINARY: return "BINARY";
|
||||
case CALL: return "CALL";
|
||||
case RETURN: return "RETURN";
|
||||
case BRANCH: return "BRANCH";
|
||||
case ALLOCA_ADDR: return "ALLOCA_ADDR";
|
||||
case UNARY: return "UNARY";
|
||||
default: return "UNKNOWN";
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
struct RegAllocResult {
|
||||
std::map<std::string, PhysicalReg> vreg_to_preg; // Virtual register to Physical Register mapping
|
||||
std::map<Value*, int> stack_map; // Value (AllocaInst) to stack offset
|
||||
int stack_size = 0; // Total stack frame size for locals and spills
|
||||
};
|
||||
|
||||
RISCv64CodeGen(Module* mod) : module(mod) {}
|
||||
|
||||
// 唯一的公共入口点
|
||||
std::string code_gen();
|
||||
std::string module_gen();
|
||||
std::string function_gen(Function* func);
|
||||
// 修改 basicBlock_gen 的声明，添加 int block_idx 参数
|
||||
std::string basicBlock_gen(BasicBlock* bb, const RegAllocResult& alloc, int block_idx);
|
||||
|
||||
// DAG related
|
||||
std::vector<std::unique_ptr<DAGNode>> build_dag(BasicBlock* bb);
|
||||
void select_instructions(DAGNode* node, const RegAllocResult& alloc);
|
||||
// 改变 emit_instructions 的参数，使其可以直接添加汇编指令到 main ss
|
||||
void emit_instructions(DAGNode* node, std::stringstream& ss, const RegAllocResult& alloc, std::set<DAGNode*>& emitted_nodes);
|
||||
|
||||
// Register Allocation related
|
||||
std::map<Instruction*, std::set<std::string>> liveness_analysis(Function* func);
|
||||
std::map<std::string, std::set<std::string>> build_interference_graph(
|
||||
const std::map<Instruction*, std::set<std::string>>& live_sets);
|
||||
void color_graph(std::map<std::string, PhysicalReg>& vreg_to_preg,
|
||||
const std::map<std::string, std::set<std::string>>& interference_graph);
|
||||
RegAllocResult register_allocation(Function* func);
|
||||
void eliminate_phi(Function* func); // Phi elimination is typically done before DAG building
|
||||
|
||||
// Utility
|
||||
std::string reg_to_string(PhysicalReg reg);
|
||||
void print_dag(const std::vector<std::unique_ptr<DAGNode>>& dag, const std::string& bb_name);
|
||||
|
||||
private:
|
||||
static const std::vector<PhysicalReg> allocable_regs;
|
||||
std::map<Value*, std::string> value_vreg_map; // Maps IR Value* to its virtual register name
|
||||
// 模块级代码生成
|
||||
std::string module_gen();
|
||||
// 函数级代码生成 (实现新的流水线)
|
||||
std::string function_gen(Function* func);
|
||||
|
||||
Module* module;
|
||||
int vreg_counter = 0; // Counter for unique virtual register names
|
||||
int alloca_offset_counter = 0; // Counter for alloca offsets
|
||||
|
||||
// 新增一个成员变量来存储当前函数的所有 DAGNode，以确保其生命周期贯穿整个函数代码生成
|
||||
// 这样可以在多个 BasicBlock_gen 调用中访问到完整的 DAG 节点
|
||||
std::vector<std::unique_ptr<DAGNode>> current_function_dag_nodes;
|
||||
|
||||
// 为空标签定义一个伪名称前缀，加上块索引以确保唯一性
|
||||
const std::string ENTRY_BLOCK_PSEUDO_NAME = "entry_block_";
|
||||
|
||||
// !!! 修改：get_operand_node 辅助函数现在需要传入 value_to_node 和 nodes_storage 的引用
|
||||
// 因为它们是 build_dag 局部管理的
|
||||
DAGNode* get_operand_node(
|
||||
Value* val_ir,
|
||||
std::map<Value*, DAGNode*>& value_to_node,
|
||||
std::vector<std::unique_ptr<DAGNode>>& nodes_storage
|
||||
);
|
||||
|
||||
// !!! 新增：create_node 辅助函数也需要传入 value_to_node 和 nodes_storage 的引用
|
||||
// 并且它应该不再是 lambda，而是一个真正的成员函数
|
||||
DAGNode* create_node(
|
||||
DAGNode::NodeKind kind,
|
||||
Value* val,
|
||||
std::map<Value*, DAGNode*>& value_to_node,
|
||||
std::vector<std::unique_ptr<DAGNode>>& nodes_storage
|
||||
);
|
||||
|
||||
std::vector<std::unique_ptr<Instruction>> temp_instructions_storage; // 用于存储 build_dag 中创建的临时 BinaryInst
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
49
src/include/RISCv64ISel.h
Normal file
49
src/include/RISCv64ISel.h
Normal file
@ -0,0 +1,49 @@
|
||||
#ifndef RISCV64_ISEL_H
|
||||
#define RISCV64_ISEL_H
|
||||
|
||||
#include "RISCv64LLIR.h"
|
||||
|
||||
namespace sysy {
|
||||
|
||||
class RISCv64ISel {
|
||||
public:
|
||||
RISCv64ISel();
|
||||
// 模块主入口：将一个高层IR函数转换为底层LLIR函数
|
||||
std::unique_ptr<MachineFunction> runOnFunction(Function* func);
|
||||
|
||||
// 公开接口，以便后续模块（如RegAlloc）可以查询或创建vreg
|
||||
unsigned getVReg(Value* val);
|
||||
unsigned getNewVReg() { return vreg_counter++; }
|
||||
|
||||
private:
|
||||
// DAG节点定义，作为ISel的内部实现细节
|
||||
struct DAGNode;
|
||||
|
||||
// 指令选择主流程
|
||||
void select();
|
||||
// 为单个基本块生成指令
|
||||
void selectBasicBlock(BasicBlock* bb);
|
||||
// 核心函数：为DAG节点选择并生成MachineInstr
|
||||
void selectNode(DAGNode* node);
|
||||
|
||||
// DAG 构建相关函数 (从原RISCv64Backend迁移)
|
||||
std::vector<std::unique_ptr<DAGNode>> build_dag(BasicBlock* bb);
|
||||
DAGNode* get_operand_node(Value* val_ir, std::map<Value*, DAGNode*>&, std::vector<std::unique_ptr<DAGNode>>&);
|
||||
DAGNode* create_node(int kind, Value* val, std::map<Value*, DAGNode*>&, std::vector<std::unique_ptr<DAGNode>>&);
|
||||
|
||||
// 状态
|
||||
Function* F; // 当前处理的高层IR函数
|
||||
std::unique_ptr<MachineFunction> MFunc; // 正在构建的底层LLIR函数
|
||||
MachineBasicBlock* CurMBB; // 当前正在处理的机器基本块
|
||||
|
||||
// 映射关系
|
||||
std::map<Value*, unsigned> vreg_map;
|
||||
std::map<const BasicBlock*, MachineBasicBlock*> bb_map;
|
||||
|
||||
unsigned vreg_counter;
|
||||
int local_label_counter;
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
#endif // RISCV64_ISEL_H
|
||||
200
src/include/RISCv64LLIR.h
Normal file
200
src/include/RISCv64LLIR.h
Normal file
@ -0,0 +1,200 @@
|
||||
#ifndef RISCV64_LLIR_H
|
||||
#define RISCV64_LLIR_H
|
||||
|
||||
#include "IR.h" // 确保包含了您自己的IR头文件
|
||||
#include <string>
|
||||
#include <vector>
|
||||
#include <memory>
|
||||
#include <cstdint>
|
||||
#include <map>
|
||||
|
||||
// 前向声明，避免循环引用
|
||||
namespace sysy {
|
||||
class Function;
|
||||
class RISCv64ISel;
|
||||
}
|
||||
|
||||
namespace sysy {
|
||||
|
||||
// 物理寄存器定义
|
||||
enum class PhysicalReg {
|
||||
ZERO, RA, SP, GP, TP, T0, T1, T2, S0, S1, A0, A1, A2, A3, A4, A5, A6, A7, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, T3, T4, T5, T6,
|
||||
F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15,F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, F31
|
||||
};
|
||||
|
||||
// RISC-V 指令操作码枚举
|
||||
enum class RVOpcodes {
|
||||
// 算术指令
|
||||
ADD, ADDI, ADDW, ADDIW, SUB, SUBW, MUL, MULW, DIV, DIVW, REM, REMW,
|
||||
// 逻辑指令
|
||||
XOR, XORI, OR, ORI, AND, ANDI,
|
||||
// 移位指令
|
||||
SLL, SLLI, SLLW, SLLIW, SRL, SRLI, SRLW, SRLIW, SRA, SRAI, SRAW, SRAIW,
|
||||
// 比较指令
|
||||
SLT, SLTI, SLTU, SLTIU,
|
||||
// 内存访问指令
|
||||
LW, LH, LB, LWU, LHU, LBU, SW, SH, SB, LD, SD,
|
||||
// 控制流指令
|
||||
J, JAL, JALR, RET,
|
||||
BEQ, BNE, BLT, BGE, BLTU, BGEU,
|
||||
// 伪指令
|
||||
LI, LA, MV, NEG, NEGW, SEQZ, SNEZ,
|
||||
// 函数调用
|
||||
CALL,
|
||||
// 特殊标记，非指令
|
||||
LABEL,
|
||||
// 新增伪指令，用于解耦栈帧处理
|
||||
FRAME_LOAD, // 从栈帧加载 (AllocaInst)
|
||||
FRAME_STORE, // 保存到栈帧 (AllocaInst)
|
||||
};
|
||||
|
||||
class MachineOperand;
|
||||
class RegOperand;
|
||||
class ImmOperand;
|
||||
class LabelOperand;
|
||||
class MemOperand;
|
||||
class MachineInstr;
|
||||
class MachineBasicBlock;
|
||||
class MachineFunction;
|
||||
|
||||
// 操作数基类
|
||||
class MachineOperand {
|
||||
public:
|
||||
enum OperandKind { KIND_REG, KIND_IMM, KIND_LABEL, KIND_MEM };
|
||||
MachineOperand(OperandKind kind) : kind(kind) {}
|
||||
virtual ~MachineOperand() = default;
|
||||
OperandKind getKind() const { return kind; }
|
||||
private:
|
||||
OperandKind kind;
|
||||
};
|
||||
|
||||
// 寄存器操作数
|
||||
class RegOperand : public MachineOperand {
|
||||
public:
|
||||
// 构造虚拟寄存器
|
||||
RegOperand(unsigned vreg_num)
|
||||
: MachineOperand(KIND_REG), vreg_num(vreg_num), is_virtual(true) {}
|
||||
|
||||
// 构造物理寄存器
|
||||
RegOperand(PhysicalReg preg)
|
||||
: MachineOperand(KIND_REG), preg(preg), is_virtual(false) {}
|
||||
|
||||
bool isVirtual() const { return is_virtual; }
|
||||
unsigned getVRegNum() const { return vreg_num; }
|
||||
PhysicalReg getPReg() const { return preg; }
|
||||
|
||||
void setPReg(PhysicalReg new_preg) {
|
||||
preg = new_preg;
|
||||
is_virtual = false;
|
||||
}
|
||||
private:
|
||||
unsigned vreg_num = 0;
|
||||
PhysicalReg preg = PhysicalReg::ZERO;
|
||||
bool is_virtual;
|
||||
};
|
||||
|
||||
// 立即数操作数
|
||||
class ImmOperand : public MachineOperand {
|
||||
public:
|
||||
ImmOperand(int64_t value) : MachineOperand(KIND_IMM), value(value) {}
|
||||
int64_t getValue() const { return value; }
|
||||
private:
|
||||
int64_t value;
|
||||
};
|
||||
|
||||
// 标签操作数
|
||||
class LabelOperand : public MachineOperand {
|
||||
public:
|
||||
LabelOperand(const std::string& name) : MachineOperand(KIND_LABEL), name(name) {}
|
||||
const std::string& getName() const { return name; }
|
||||
private:
|
||||
std::string name;
|
||||
};
|
||||
|
||||
// 内存操作数, 表示 offset(base_reg)
|
||||
class MemOperand : public MachineOperand {
|
||||
public:
|
||||
MemOperand(std::unique_ptr<RegOperand> base, std::unique_ptr<ImmOperand> offset)
|
||||
: MachineOperand(KIND_MEM), base(std::move(base)), offset(std::move(offset)) {}
|
||||
RegOperand* getBase() const { return base.get(); }
|
||||
ImmOperand* getOffset() const { return offset.get(); }
|
||||
private:
|
||||
std::unique_ptr<RegOperand> base;
|
||||
std::unique_ptr<ImmOperand> offset;
|
||||
};
|
||||
|
||||
// 机器指令
|
||||
class MachineInstr {
|
||||
public:
|
||||
MachineInstr(RVOpcodes opcode) : opcode(opcode) {}
|
||||
|
||||
RVOpcodes getOpcode() const { return opcode; }
|
||||
const std::vector<std::unique_ptr<MachineOperand>>& getOperands() const { return operands; }
|
||||
std::vector<std::unique_ptr<MachineOperand>>& getOperands() { return operands; }
|
||||
|
||||
void addOperand(std::unique_ptr<MachineOperand> operand) {
|
||||
operands.push_back(std::move(operand));
|
||||
}
|
||||
private:
|
||||
RVOpcodes opcode;
|
||||
std::vector<std::unique_ptr<MachineOperand>> operands;
|
||||
};
|
||||
|
||||
// 机器基本块
|
||||
class MachineBasicBlock {
|
||||
public:
|
||||
MachineBasicBlock(const std::string& name, MachineFunction* parent)
|
||||
: name(name), parent(parent) {}
|
||||
|
||||
const std::string& getName() const { return name; }
|
||||
MachineFunction* getParent() const { return parent; }
|
||||
const std::vector<std::unique_ptr<MachineInstr>>& getInstructions() const { return instructions; }
|
||||
std::vector<std::unique_ptr<MachineInstr>>& getInstructions() { return instructions; }
|
||||
|
||||
void addInstruction(std::unique_ptr<MachineInstr> instr) {
|
||||
instructions.push_back(std::move(instr));
|
||||
}
|
||||
|
||||
std::vector<MachineBasicBlock*> successors;
|
||||
std::vector<MachineBasicBlock*> predecessors;
|
||||
private:
|
||||
std::string name;
|
||||
std::vector<std::unique_ptr<MachineInstr>> instructions;
|
||||
MachineFunction* parent;
|
||||
};
|
||||
|
||||
// 栈帧信息
|
||||
struct StackFrameInfo {
|
||||
int locals_size = 0; // 仅为AllocaInst分配的大小
|
||||
int spill_size = 0; // 仅为溢出分配的大小
|
||||
int total_size = 0; // 总大小
|
||||
std::map<unsigned, int> alloca_offsets; // <AllocaInst的vreg, 栈偏移>
|
||||
std::map<unsigned, int> spill_offsets; // <溢出vreg, 栈偏移>
|
||||
};
|
||||
|
||||
// 机器函数
|
||||
class MachineFunction {
|
||||
public:
|
||||
MachineFunction(Function* func, RISCv64ISel* isel) : F(func), name(func->getName()), isel(isel) {}
|
||||
|
||||
Function* getFunc() const { return F; }
|
||||
RISCv64ISel* getISel() const { return isel; }
|
||||
const std::string& getName() const { return name; }
|
||||
StackFrameInfo& getFrameInfo() { return frame_info; }
|
||||
const std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() const { return blocks; }
|
||||
std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() { return blocks; }
|
||||
|
||||
void addBlock(std::unique_ptr<MachineBasicBlock> block) {
|
||||
blocks.push_back(std::move(block));
|
||||
}
|
||||
private:
|
||||
Function* F;
|
||||
RISCv64ISel* isel; // 指向创建它的ISel，用于获取vreg映射等信息
|
||||
std::string name;
|
||||
std::vector<std::unique_ptr<MachineBasicBlock>> blocks;
|
||||
StackFrameInfo frame_info;
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
#endif // RISCV64_LLIR_H
|
||||
61
src/include/RISCv64Passes.h
Normal file
61
src/include/RISCv64Passes.h
Normal file
@ -0,0 +1,61 @@
|
||||
#ifndef RISCV64_PASSES_H
|
||||
#define RISCV64_PASSES_H
|
||||
|
||||
#include "RISCv64LLIR.h"
|
||||
|
||||
namespace sysy {
|
||||
|
||||
/**
|
||||
* @class Pass
|
||||
* @brief 所有优化Pass的抽象基类 (可选，但推荐)
|
||||
* * 定义一个通用的接口，所有优化都应该实现它。
|
||||
*/
|
||||
class Pass {
|
||||
public:
|
||||
virtual ~Pass() = default;
|
||||
virtual void runOnMachineFunction(MachineFunction* mfunc) = 0;
|
||||
};
|
||||
|
||||
|
||||
// --- 寄存器分配前优化 ---
|
||||
|
||||
/**
|
||||
* @class PreRA_Scheduler
|
||||
* @brief 寄存器分配前的指令调度器
|
||||
* * 在虚拟寄存器上进行操作，此时调度自由度最大，
|
||||
* 主要目标是隐藏指令延迟，提高流水线效率。
|
||||
*/
|
||||
class PreRA_Scheduler : public Pass {
|
||||
public:
|
||||
void runOnMachineFunction(MachineFunction* mfunc) override;
|
||||
};
|
||||
|
||||
|
||||
// --- 寄存器分配后优化 ---
|
||||
|
||||
/**
|
||||
* @class PeepholeOptimizer
|
||||
* @brief 窥孔优化器
|
||||
* * 在已分配物理寄存器的指令流上，通过一个小的滑动窗口来查找
|
||||
* 并替换掉一些冗余或低效的指令模式。
|
||||
*/
|
||||
class PeepholeOptimizer : public Pass {
|
||||
public:
|
||||
void runOnMachineFunction(MachineFunction* mfunc) override;
|
||||
};
|
||||
|
||||
/**
|
||||
* @class PostRA_Scheduler
|
||||
* @brief 寄存器分配后的局部指令调度器
|
||||
* * 主要目标是优化寄存器分配器插入的spill/fill代码(lw/sw)，
|
||||
* 尝试将加载指令提前，以隐藏其访存延迟。
|
||||
*/
|
||||
class PostRA_Scheduler : public Pass {
|
||||
public:
|
||||
void runOnMachineFunction(MachineFunction* mfunc) override;
|
||||
};
|
||||
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
#endif // RISCV64_PASSES_H
|
||||
56
src/include/RISCv64RegAlloc.h
Normal file
56
src/include/RISCv64RegAlloc.h
Normal file
@ -0,0 +1,56 @@
|
||||
#ifndef RISCV64_REGALLOC_H
|
||||
#define RISCV64_REGALLOC_H
|
||||
|
||||
#include "RISCv64LLIR.h"
|
||||
|
||||
namespace sysy {
|
||||
|
||||
class RISCv64RegAlloc {
|
||||
public:
|
||||
RISCv64RegAlloc(MachineFunction* mfunc);
|
||||
|
||||
// 模块主入口
|
||||
void run();
|
||||
|
||||
private:
|
||||
using LiveSet = std::set<unsigned>; // 活跃虚拟寄存器集合
|
||||
using InterferenceGraph = std::map<unsigned, std::set<unsigned>>;
|
||||
|
||||
// 栈帧管理
|
||||
void eliminateFrameIndices();
|
||||
|
||||
// 活跃性分析
|
||||
void analyzeLiveness();
|
||||
|
||||
// 构建干扰图
|
||||
void buildInterferenceGraph();
|
||||
|
||||
// 图着色分配寄存器
|
||||
void colorGraph();
|
||||
|
||||
// 重写函数，替换vreg并插入溢出代码
|
||||
void rewriteFunction();
|
||||
|
||||
// 辅助函数，获取指令的Use/Def集合
|
||||
void getInstrUseDef(MachineInstr* instr, LiveSet& use, LiveSet& def);
|
||||
|
||||
MachineFunction* MFunc;
|
||||
|
||||
// 活跃性分析结果
|
||||
std::map<const MachineInstr*, LiveSet> live_in_map;
|
||||
std::map<const MachineInstr*, LiveSet> live_out_map;
|
||||
|
||||
// 干扰图
|
||||
InterferenceGraph interference_graph;
|
||||
|
||||
// 图着色结果
|
||||
std::map<unsigned, PhysicalReg> color_map; // vreg -> preg
|
||||
std::set<unsigned> spilled_vregs; // 被溢出的vreg集合
|
||||
|
||||
// 可用的物理寄存器池
|
||||
std::vector<PhysicalReg> allocable_int_regs;
|
||||
};
|
||||
|
||||
} // namespace sysy
|
||||
|
||||
#endif // RISCV64_REGALLOC_H
|
||||
@ -16,9 +16,10 @@ using namespace antlr4;
|
||||
#include "SysYIRCFGOpt.h"
|
||||
#include "RISCv64Backend.h"
|
||||
#include "SysYIRAnalyser.h"
|
||||
#include "DeadCodeElimination.h"
|
||||
#include "Mem2Reg.h"
|
||||
#include "Reg2Mem.h"
|
||||
// #include "DeadCodeElimination.h"
|
||||
#include "AddressCalculationExpansion.h"
|
||||
// #include "Mem2Reg.h"
|
||||
// #include "Reg2Mem.h"
|
||||
|
||||
using namespace sysy;
|
||||
|
||||
@ -124,8 +125,12 @@ int main(int argc, char **argv) {
|
||||
// 无论最终输出是 IR 还是 ASM，只要不是停止在 AST 阶段，都会进入此优化流程。
|
||||
// optLevel = 0 时，执行默认优化。
|
||||
// optLevel >= 1 时，执行默认优化 + 额外的 -O1 优化。
|
||||
cout << "Applying middle-end optimizations (level -O" << optLevel << ")...\n";
|
||||
if (DEBUG) cout << "Applying middle-end optimizations (level -O" << optLevel << ")...\n";
|
||||
|
||||
// 设置 DEBUG 模式（如果指定了 'ird'）
|
||||
if (argStopAfter == "ird") {
|
||||
DEBUG = 1; // 这里可能需要更精细地控制 DEBUG 的开启时机和范围
|
||||
}
|
||||
// 默认优化 pass (在所有优化级别都会执行)
|
||||
SysYCFGOpt cfgopt(moduleIR, builder);
|
||||
cfgopt.SysYOptimizateAfterIR();
|
||||
@ -139,37 +144,22 @@ int main(int argc, char **argv) {
|
||||
cout << "=== After CFA & AVA (Default) ===\n";
|
||||
SysYPrinter(moduleIR).printIR(); // 临时打印器用于调试
|
||||
}
|
||||
|
||||
DeadCodeElimination dce(moduleIR, &cfa, &ava);
|
||||
dce.runDCEPipeline();
|
||||
if (DEBUG) {
|
||||
cout << "=== After 1st DCE (Default) ===\n";
|
||||
SysYPrinter(moduleIR).printIR();
|
||||
AddressCalculationExpansion ace(moduleIR, builder);
|
||||
if (ace.run()) {
|
||||
if (DEBUG) cout << "AddressCalculationExpansion made changes.\n";
|
||||
// 如果 ACE 改变了IR，并且 DEBUG 模式开启，可以考虑打印IR
|
||||
if (DEBUG) {
|
||||
cout << "=== After AddressCalculationExpansion ===\n";
|
||||
SysYPrinter(moduleIR).printIR();
|
||||
}
|
||||
} else {
|
||||
if (DEBUG) cout << "AddressCalculationExpansion made no changes.\n";
|
||||
}
|
||||
|
||||
Mem2Reg mem2reg(moduleIR, builder, &cfa, &ava);
|
||||
mem2reg.mem2regPipeline();
|
||||
if (DEBUG) {
|
||||
cout << "=== After Mem2Reg (Default) ===\n";
|
||||
SysYPrinter(moduleIR).printIR();
|
||||
}
|
||||
|
||||
Reg2Mem reg2mem(moduleIR, builder);
|
||||
reg2mem.DeletePhiInst();
|
||||
if (DEBUG) {
|
||||
cout << "=== After Reg2Mem (Default) ===\n";
|
||||
SysYPrinter(moduleIR).printIR();
|
||||
}
|
||||
|
||||
dce.runDCEPipeline(); // 第二次 DCE (默认)
|
||||
if (DEBUG) {
|
||||
cout << "=== After 2nd DCE (Default) ===\n";
|
||||
SysYPrinter(moduleIR).printIR();
|
||||
}
|
||||
|
||||
// 根据优化级别，执行额外的优化 pass
|
||||
if (optLevel >= 1) {
|
||||
cout << "Applying additional -O" << optLevel << " optimizations...\n";
|
||||
if (DEBUG) cout << "Applying additional -O" << optLevel << " optimizations...\n";
|
||||
// 放置 -O1 及其以上级别要启用的额外优化 pass
|
||||
// 例如：
|
||||
// MyNewOptimizationPass newOpt(moduleIR, builder);
|
||||
@ -184,17 +174,39 @@ int main(int argc, char **argv) {
|
||||
// MyCustomOpt2 opt2_pass(moduleIR, builder, &cfa); // 假设需要CFA
|
||||
// opt2_pass.run();
|
||||
// ... 更多 -O1 特有的优化
|
||||
// DeadCodeElimination dce(moduleIR, &cfa, &ava);
|
||||
// dce.runDCEPipeline();
|
||||
// if (DEBUG) {
|
||||
// cout << "=== After 1st DCE (Default) ===\n";
|
||||
// SysYPrinter(moduleIR).printIR();
|
||||
// }
|
||||
|
||||
// Mem2Reg mem2reg(moduleIR, builder, &cfa, &ava);
|
||||
// mem2reg.mem2regPipeline();
|
||||
// if (DEBUG) {
|
||||
// cout << "=== After Mem2Reg (Default) ===\n";
|
||||
// SysYPrinter(moduleIR).printIR();
|
||||
// }
|
||||
|
||||
// Reg2Mem reg2mem(moduleIR, builder);
|
||||
// reg2mem.DeletePhiInst();
|
||||
// if (DEBUG) {
|
||||
// cout << "=== After Reg2Mem (Default) ===\n";
|
||||
// SysYPrinter(moduleIR).printIR();
|
||||
// }
|
||||
|
||||
// dce.runDCEPipeline(); // 第二次 DCE (默认)
|
||||
// if (DEBUG) {
|
||||
// cout << "=== After 2nd DCE (Default) ===\n";
|
||||
// SysYPrinter(moduleIR).printIR();
|
||||
// }
|
||||
} else {
|
||||
cout << "No additional middle-end optimizations applied for -O" << optLevel << ".\n";
|
||||
if (DEBUG) cout << "No additional middle-end optimizations applied for -O" << optLevel << ".\n";
|
||||
}
|
||||
|
||||
// 5. 根据 argStopAfter 决定后续操作
|
||||
// a) 如果指定停止在 IR 阶段，则打印最终 IR 并退出
|
||||
if (argStopAfter == "ir" || argStopAfter == "ird") {
|
||||
// 设置 DEBUG 模式（如果指定了 'ird'）
|
||||
if (argStopAfter == "ird") {
|
||||
DEBUG = 1; // 这里可能需要更精细地控制 DEBUG 的开启时机和范围
|
||||
}
|
||||
// 打印最终 IR
|
||||
cout << "=== Final IR ===\n";
|
||||
SysYPrinter printer(moduleIR); // 在这里创建打印器，因为可能之前调试时用过临时打印器
|
||||
@ -203,17 +215,16 @@ int main(int argc, char **argv) {
|
||||
}
|
||||
|
||||
// b) 如果未停止在 IR 阶段，则继续生成汇编 (后端)
|
||||
// 设置 DEBUG 模式（如果指定了 'asmd'）
|
||||
if (argStopAfter == "asmd") {
|
||||
DEBUG = 1;
|
||||
// DEEPDEBUG = 1;
|
||||
}
|
||||
sysy::RISCv64CodeGen codegen(moduleIR); // 传入优化后的 moduleIR
|
||||
string asmCode = codegen.code_gen();
|
||||
|
||||
// 如果指定停止在 ASM 阶段，则打印/保存汇编并退出
|
||||
if (argStopAfter == "asm" || argStopAfter == "asmd") {
|
||||
// 设置 DEBUG 模式（如果指定了 'asmd'）
|
||||
if (argStopAfter == "asmd") {
|
||||
DEBUG = 1;
|
||||
DEEPDEBUG = 1;
|
||||
}
|
||||
|
||||
if (!argOutputFilename.empty()) {
|
||||
ofstream fout(argOutputFilename);
|
||||
if (not fout.is_open()) {
|
||||
|
||||
@ -20,7 +20,12 @@ TESTDATA_DIR="${SCRIPT_DIR}/testdata"
|
||||
|
||||
# 定义编译器 (这里假设 gcc 在 VM 内部是可用的)
|
||||
GCC_NATIVE="gcc" # VM 内部的 gcc
|
||||
# 不再需要 QEMU_RISCV64，因为直接执行
|
||||
|
||||
# --- 新增功能: 初始化变量 ---
|
||||
TIMEOUT_SECONDS=5 # 默认运行时超时时间为 5 秒
|
||||
COMPILE_TIMEOUT_SECONDS=10 # 默认编译超时时间为 10 秒
|
||||
TOTAL_CASES=0
|
||||
PASSED_CASES=0
|
||||
|
||||
# 显示帮助信息的函数
|
||||
show_help() {
|
||||
@ -29,31 +34,32 @@ show_help() {
|
||||
echo "假设当前运行环境已经是 RISC-V 64 位架构，可以直接执行编译后的程序。"
|
||||
echo ""
|
||||
echo "选项:"
|
||||
echo " -c, --clean 清理 'tmp' 目录下的所有生成文件。"
|
||||
echo " -h, --help 显示此帮助信息并退出。"
|
||||
echo " -c, --clean 清理 'tmp' 目录下的所有生成文件。"
|
||||
echo " -t, --timeout N 设置每个测试用例的运行时超时为 N 秒 (默认: 5)。"
|
||||
echo " -ct, --compile-timeout M 设置 gcc 编译的超时时间为 M 秒 (默认: 10)。"
|
||||
echo " -h, --help 显示此帮助信息并退出。"
|
||||
echo ""
|
||||
echo "执行步骤:"
|
||||
echo "1. 遍历 'tmp/' 目录下的所有 .s 汇编文件。"
|
||||
echo "2. 使用 VM 内部的 gcc 将 .s 文件汇编并链接为可执行文件 (链接 -L./lib -lsysy_riscv -static)。"
|
||||
echo "3. 直接运行编译后的可执行文件。"
|
||||
echo "4. 根据对应的 testdata/*.out 文件内容（最后一行是否为整数）决定是进行返回值比较、标准输出比较，或两者都进行。"
|
||||
echo "5. 如果没有对应的 .in/.out 文件，则打印可执行文件的返回值。"
|
||||
echo "6. 输出比较时会忽略行尾多余的换行符。"
|
||||
echo "2. 在指定的超时时间内使用 VM 内部的 gcc 将 .s 文件汇编并链接为可执行文件。"
|
||||
echo "3. 在指定的超时时间内运行编译后的可执行文件。"
|
||||
echo "4. 根据对应的 .out 文件内容进行返回值和/或标准输出的比较。"
|
||||
echo "5. 输出比较时会忽略行尾多余的换行符。"
|
||||
echo "6. 所有测试结束后，报告总通过率。"
|
||||
}
|
||||
|
||||
# 清理临时文件的函数
|
||||
clean_tmp() {
|
||||
echo "正在清理临时目录: ${TMP_DIR}"
|
||||
# 清理所有由本脚本和 runit.sh 生成的文件
|
||||
rm -rf "${TMP_DIR}"/*.s \
|
||||
"${TMP_DIR}"/*_sysyc_riscv64 \
|
||||
"${TMP_DIR}"/*_sysyc_riscv64.actual_out \
|
||||
"${TMP_DIR}"/*_sysyc_riscv64.expected_stdout \
|
||||
"${TMP_DIR}"/*_sysyc_riscv64.o # 以防生成了 .o 文件
|
||||
"${TMP_DIR}"/*_sysyc_riscv64.o
|
||||
echo "清理完成。"
|
||||
}
|
||||
|
||||
# 如果临时目录不存在，则创建它 (尽管 runit.sh 应该已经创建了)
|
||||
# 如果临时目录不存在，则创建它
|
||||
mkdir -p "${TMP_DIR}"
|
||||
|
||||
# 解析命令行参数
|
||||
@ -63,6 +69,24 @@ while [[ "$#" -gt 0 ]]; do
|
||||
clean_tmp
|
||||
exit 0
|
||||
;;
|
||||
-t|--timeout)
|
||||
if [[ -n "$2" && "$2" =~ ^[0-9]+$ ]]; then
|
||||
TIMEOUT_SECONDS="$2"
|
||||
shift # 移过参数值
|
||||
else
|
||||
echo "错误: --timeout 需要一个正整数参数。" >&2
|
||||
exit 1
|
||||
fi
|
||||
;;
|
||||
-ct|--compile-timeout)
|
||||
if [[ -n "$2" && "$2" =~ ^[0-9]+$ ]]; then
|
||||
COMPILE_TIMEOUT_SECONDS="$2"
|
||||
shift # 移过参数值
|
||||
else
|
||||
echo "错误: --compile-timeout 需要一个正整数参数。" >&2
|
||||
exit 1
|
||||
fi
|
||||
;;
|
||||
-h|--help)
|
||||
show_help
|
||||
exit 0
|
||||
@ -73,30 +97,33 @@ while [[ "$#" -gt 0 ]]; do
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
shift # 移过参数名
|
||||
done
|
||||
|
||||
echo "SysY VM 内部测试运行器启动..."
|
||||
echo "编译超时设置为: ${COMPILE_TIMEOUT_SECONDS} 秒"
|
||||
echo "运行时超时设置为: ${TIMEOUT_SECONDS} 秒"
|
||||
echo "汇编文件目录: ${TMP_DIR}"
|
||||
echo "库文件目录: ${LIB_DIR}"
|
||||
echo "测试数据目录: ${TESTDATA_DIR}"
|
||||
echo ""
|
||||
|
||||
# 查找 tmp 目录下的所有 .s 汇编文件
|
||||
s_files=$(find "${TMP_DIR}" -maxdepth 1 -name "*.s")
|
||||
TOTAL_CASES=$(echo "$s_files" | wc -w)
|
||||
|
||||
# 遍历找到的每个 .s 文件
|
||||
find "${TMP_DIR}" -maxdepth 1 -name "*.s" | while read s_file; do
|
||||
echo "$s_files" | while read s_file; do
|
||||
# --- 新增功能: 初始化用例通过状态 ---
|
||||
is_passed=1 # 1 表示通过, 0 表示失败
|
||||
|
||||
# 从 .s 文件名中提取原始的测试用例名称部分
|
||||
# 例如：从 functional_21_if_test2_sysyc_riscv64.s 提取 functional_21_if_test2
|
||||
base_name_from_s_file=$(basename "$s_file" .s)
|
||||
# 这一步得到的是 'functional_21_if_test2' 或 'performance_2024-2D0-22'
|
||||
original_test_name_underscored=$(echo "$base_name_from_s_file" | sed 's/_sysyc_riscv64$//')
|
||||
|
||||
# 将 `original_test_name_underscored` 分割成类别和文件名
|
||||
# 例如：'functional_21_if_test2' 分割为 'functional' 和 '21_if_test2'
|
||||
category=$(echo "$original_test_name_underscored" | cut -d'_' -f1)
|
||||
# cut -d'_' -f2- 会从第二个下划线开始获取所有剩余部分
|
||||
test_file_base=$(echo "$original_test_name_underscored" | cut -d'_' -f2-)
|
||||
|
||||
# 构建原始的相对路径，例如：'functional/21_if_test2'
|
||||
original_relative_path="${category}/${test_file_base}"
|
||||
|
||||
# 定义可执行文件、输入文件、参考输出文件和实际输出文件的路径
|
||||
@ -109,109 +136,112 @@ find "${TMP_DIR}" -maxdepth 1 -name "*.s" | while read s_file; do
|
||||
echo " 对应的测试用例路径: ${original_relative_path}"
|
||||
|
||||
# 步骤 1: 使用 VM 内部的 gcc 编译 .s 到可执行文件
|
||||
# 注意：这里假设 gcc 在 VM 环境中可用，且 ./lib 是相对于当前脚本运行目录
|
||||
echo " 使用 gcc 汇编并链接: ${GCC_NATIVE} \"${s_file}\" -o \"${executable_file}\" -L\"${LIB_DIR}\" -lsysy_riscv -static -g"
|
||||
"${GCC_NATIVE}" "${s_file}" -o "${executable_file}" -L"${LIB_DIR}" -lsysy_riscv -static -g
|
||||
if [ $? -ne 0 ]; then
|
||||
echo -e "\e[31m错误: GCC 汇编/链接 ${s_file} 失败\e[0m"
|
||||
continue
|
||||
fi
|
||||
echo " 生成的可执行文件: ${executable_file}"
|
||||
echo " 使用 gcc 汇编并链接 (超时 ${COMPILE_TIMEOUT_SECONDS}s)..."
|
||||
# --- 修改点: 为 gcc 增加 timeout ---
|
||||
timeout ${COMPILE_TIMEOUT_SECONDS} "${GCC_NATIVE}" "${s_file}" -o "${executable_file}" -L"${LIB_DIR}" -lsysy_riscv -static -g
|
||||
GCC_STATUS=$?
|
||||
if [ $GCC_STATUS -eq 124 ]; then
|
||||
echo -e "\e[31m错误: GCC 编译/链接 ${s_file} 超时 (超过 ${COMPILE_TIMEOUT_SECONDS} 秒)\e[0m"
|
||||
is_passed=0
|
||||
elif [ $GCC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[31m错误: GCC 汇编/链接 ${s_file} 失败，退出码: ${GCC_STATUS}\e[0m"
|
||||
is_passed=0
|
||||
else
|
||||
echo " 生成的可执行文件: ${executable_file}"
|
||||
echo " 正在执行 (超时 ${TIMEOUT_SECONDS}s): \"${executable_file}\""
|
||||
|
||||
# 步骤 2: 执行编译后的文件并比较/报告结果
|
||||
# 直接执行可执行文件，不再通过 qemu-riscv64
|
||||
echo " 正在执行: \"${executable_file}\"" # 修改点：移除多余的 ./
|
||||
|
||||
# 检查是否存在 .out 文件
|
||||
if [ -f "${output_reference_file}" ]; then
|
||||
# 尝试从 .out 文件中提取期望的返回码和期望的标准输出
|
||||
# 获取 .out 文件的最后一行，去除空白字符
|
||||
LAST_LINE_TRIMMED=$(tail -n 1 "${output_reference_file}" | tr -d '[:space:]')
|
||||
|
||||
# 检查最后一行是否为纯整数 (允许正负号)
|
||||
if [[ "$LAST_LINE_TRIMMED" =~ ^[-+]?[0-9]+$ ]]; then
|
||||
# 假设最后一行是期望的返回码
|
||||
EXPECTED_RETURN_CODE="$LAST_LINE_TRIMMED"
|
||||
# 步骤 2: 执行编译后的文件并比较/报告结果
|
||||
if [ -f "${output_reference_file}" ]; then
|
||||
LAST_LINE_TRIMMED=$(tail -n 1 "${output_reference_file}" | tr -d '[:space:]')
|
||||
|
||||
# 创建一个只包含期望标准输出的临时文件 (所有行除了最后一行)
|
||||
EXPECTED_STDOUT_FILE="${TMP_DIR}/${base_name_from_s_file}.expected_stdout"
|
||||
# 使用 head -n -1 来获取除了最后一行之外的所有行。如果文件只有一行，则生成一个空文件。
|
||||
head -n -1 "${output_reference_file}" > "${EXPECTED_STDOUT_FILE}"
|
||||
if [[ "$LAST_LINE_TRIMMED" =~ ^[-+]?[0-9]+$ ]]; then
|
||||
EXPECTED_RETURN_CODE="$LAST_LINE_TRIMMED"
|
||||
EXPECTED_STDOUT_FILE="${TMP_DIR}/${base_name_from_s_file}.expected_stdout"
|
||||
head -n -1 "${output_reference_file}" > "${EXPECTED_STDOUT_FILE}"
|
||||
echo " 检测到 .out 文件同时包含标准输出和期望的返回码。"
|
||||
echo " 期望返回码: ${EXPECTED_RETURN_CODE}"
|
||||
|
||||
echo " 检测到 .out 文件同时包含标准输出和期望的返回码。"
|
||||
echo " 期望返回码: ${EXPECTED_RETURN_CODE}"
|
||||
if [ -s "${EXPECTED_STDOUT_FILE}" ]; then # -s 检查文件是否非空
|
||||
echo " 期望标准输出文件: ${EXPECTED_STDOUT_FILE}"
|
||||
else
|
||||
echo " 期望标准输出为空。"
|
||||
fi
|
||||
if [ -f "${input_file}" ]; then
|
||||
timeout ${TIMEOUT_SECONDS} "${executable_file}" < "${input_file}" > "${output_actual_file}"
|
||||
else
|
||||
timeout ${TIMEOUT_SECONDS} "${executable_file}" > "${output_actual_file}"
|
||||
fi
|
||||
ACTUAL_RETURN_CODE=$?
|
||||
|
||||
# 执行程序，捕获实际返回码和实际标准输出
|
||||
if [ -f "${input_file}" ]; then
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
"${executable_file}" < "${input_file}" > "${output_actual_file}" # 修改点：移除多余的 ./
|
||||
else
|
||||
"${executable_file}" > "${output_actual_file}" # 修改点：移除多余的 ./
|
||||
fi
|
||||
ACTUAL_RETURN_CODE=$? # 捕获执行状态
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq 124 ]; then
|
||||
echo -e "\e[31m 执行超时: ${original_relative_path}.sy 运行超过 ${TIMEOUT_SECONDS} 秒\e[0m"
|
||||
is_passed=0
|
||||
else
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq "$EXPECTED_RETURN_CODE" ]; then
|
||||
echo -e "\e[32m 返回码测试成功: (${ACTUAL_RETURN_CODE}) 与期望值 (${EXPECTED_RETURN_CODE}) 匹配\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 返回码测试失败: 期望: ${EXPECTED_RETURN_CODE}, 实际: ${ACTUAL_RETURN_CODE}\e[0m"
|
||||
is_passed=0
|
||||
fi
|
||||
|
||||
# 比较实际返回码与期望返回码
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq "$EXPECTED_RETURN_CODE" ]; then
|
||||
echo -e "\e[32m 返回码测试成功: ${original_relative_path}.sy 的返回码 (${ACTUAL_RETURN_CODE}) 与期望值 (${EXPECTED_RETURN_CODE}) 匹配\e[0m"
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${EXPECTED_STDOUT_FILE}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 标准输出测试成功\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 标准输出测试失败\e[0m"
|
||||
echo " 差异:"
|
||||
diff "${output_actual_file}" "${EXPECTED_STDOUT_FILE}"
|
||||
is_passed=0
|
||||
fi
|
||||
fi
|
||||
else
|
||||
echo -e "\e[31m 返回码测试失败: ${original_relative_path}.sy 的返回码不匹配。期望: ${EXPECTED_RETURN_CODE}, 实际: ${ACTUAL_RETURN_CODE}\e[0m"
|
||||
fi
|
||||
echo " 检测到 .out 文件为纯标准输出参考。"
|
||||
if [ -f "${input_file}" ]; then
|
||||
timeout ${TIMEOUT_SECONDS} "${executable_file}" < "${input_file}" > "${output_actual_file}"
|
||||
else
|
||||
timeout ${TIMEOUT_SECONDS} "${executable_file}" > "${output_actual_file}"
|
||||
fi
|
||||
EXEC_STATUS=$?
|
||||
|
||||
# 比较实际标准输出与期望标准输出，忽略文件末尾的换行符差异
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${EXPECTED_STDOUT_FILE}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 标准输出测试成功: 输出与 ${original_relative_path}.sy 的参考输出匹配 (忽略行尾换行符差异)\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 标准输出测试失败: ${original_relative_path}.sy 的输出不匹配\e[0m"
|
||||
echo " 差异 (可能包含行尾换行符差异):"
|
||||
diff "${output_actual_file}" "${EXPECTED_STDOUT_FILE}" # 显示原始差异以便调试
|
||||
if [ $EXEC_STATUS -eq 124 ]; then
|
||||
echo -e "\e[31m 执行超时: ${original_relative_path}.sy 运行超过 ${TIMEOUT_SECONDS} 秒\e[0m"
|
||||
is_passed=0
|
||||
else
|
||||
if [ $EXEC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[33m警告: 程序以非零状态 ${EXEC_STATUS} 退出 (纯输出比较模式)。\e[0m"
|
||||
fi
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${output_reference_file}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 成功: 输出与参考输出匹配\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 失败: 输出不匹配\e[0m"
|
||||
echo " 差异:"
|
||||
diff "${output_actual_file}" "${output_reference_file}"
|
||||
is_passed=0
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
else
|
||||
# 最后一行不是纯整数，将整个 .out 文件视为纯标准输出
|
||||
echo " 检测到 .out 文件为纯标准输出参考。正在与输出文件比较: ${output_reference_file}"
|
||||
|
||||
# 执行程序，并将输出重定向到临时文件
|
||||
if [ -f "${input_file}" ]; then
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
"${executable_file}" < "${input_file}" > "${output_actual_file}" # 修改点：移除多余的 ./
|
||||
echo " 未找到 .out 文件。正在运行并报告返回码。"
|
||||
timeout ${TIMEOUT_SECONDS} "${executable_file}"
|
||||
EXEC_STATUS=$?
|
||||
if [ $EXEC_STATUS -eq 124 ]; then
|
||||
echo -e "\e[31m 执行超时: ${original_relative_path}.sy 运行超过 ${TIMEOUT_SECONDS} 秒\e[0m"
|
||||
is_passed=0
|
||||
else
|
||||
"${executable_file}" > "${output_actual_file}" # 修改点：移除多余的 ./
|
||||
fi
|
||||
EXEC_STATUS=$? # 捕获执行状态
|
||||
|
||||
if [ $EXEC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[33m警告: 可执行文件 ${original_relative_path}.sy 以非零状态 ${EXEC_STATUS} 退出 (纯输出比较模式)。请检查程序逻辑或其是否应返回此状态。\e[0m"
|
||||
fi
|
||||
|
||||
# 比较实际输出与参考输出，忽略文件末尾的换行符差异
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${output_reference_file}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 成功: 输出与 ${original_relative_path}.sy 的参考输出匹配 (忽略行尾换行符差异)\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 失败: ${original_relative_path}.sy 的输出不匹配\e[0m"
|
||||
echo " 差异 (可能包含行尾换行符差异):"
|
||||
diff "${output_actual_file}" "${output_reference_file}" # 显示原始差异以便调试
|
||||
echo " ${original_relative_path}.sy 的返回码: ${EXEC_STATUS}"
|
||||
fi
|
||||
fi
|
||||
elif [ -f "${input_file}" ]; then
|
||||
# 只有 .in 文件存在，使用输入运行并报告退出码（无参考输出）
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
echo " 没有 .out 文件进行比较。正在运行并报告返回码。"
|
||||
"${executable_file}" < "${input_file}" # 修改点：移除多余的 ./
|
||||
EXEC_STATUS=$?
|
||||
echo " ${original_relative_path}.sy 的返回码: ${EXEC_STATUS}"
|
||||
else
|
||||
# .in 和 .out 文件都不存在，只运行并报告退出码
|
||||
echo " 未找到 .in 或 .out 文件。正在运行并报告返回码。"
|
||||
"${executable_file}" # 修改点：移除多余的 ./
|
||||
EXEC_STATUS=$?
|
||||
echo " ${original_relative_path}.sy 的返回码: ${EXEC_STATUS}"
|
||||
fi
|
||||
echo "" # 为测试用例之间添加一个空行，以提高可读性
|
||||
|
||||
# --- 新增功能: 更新通过用例计数 ---
|
||||
if [ "$is_passed" -eq 1 ]; then
|
||||
((PASSED_CASES++))
|
||||
fi
|
||||
echo "" # 为测试用例之间添加一个空行
|
||||
done
|
||||
|
||||
echo "脚本完成。"
|
||||
# --- 新增功能: 打印最终总结 ---
|
||||
echo "========================================"
|
||||
echo "测试完成"
|
||||
echo "测试通过率: [${PASSED_CASES}/${TOTAL_CASES}]"
|
||||
echo "========================================"
|
||||
|
||||
if [ "$PASSED_CASES" -eq "$TOTAL_CASES" ]; then
|
||||
exit 0
|
||||
else
|
||||
exit 1
|
||||
fi
|
||||
|
||||
@ -9,45 +9,40 @@ TESTDATA_DIR="${SCRIPT_DIR}/../testdata"
|
||||
BUILD_BIN_DIR="${SCRIPT_DIR}/../build/bin"
|
||||
LIB_DIR="${SCRIPT_DIR}/../lib"
|
||||
# TMP_DIR="${SCRIPT_DIR}/tmp"
|
||||
TMP_DIR="/home/ladev987/paraComp/debug/share_folder/tmp"
|
||||
TMP_DIR="${SCRIPT_DIR}/tmp"
|
||||
|
||||
# 定义编译器和模拟器
|
||||
SYSYC="${BUILD_BIN_DIR}/sysyc"
|
||||
GCC_RISCV64="riscv64-linux-gnu-gcc"
|
||||
QEMU_RISCV64="qemu-riscv64"
|
||||
|
||||
# 标志，用于确定是否应该生成和运行可执行文件
|
||||
# --- 新增功能: 初始化变量 ---
|
||||
EXECUTE_MODE=false
|
||||
SYSYC_TIMEOUT=10 # sysyc 编译超时 (秒)
|
||||
GCC_TIMEOUT=10 # gcc 编译超时 (秒)
|
||||
EXEC_TIMEOUT=5 # qemu 执行超时 (秒)
|
||||
TOTAL_CASES=0
|
||||
PASSED_CASES=0
|
||||
FAILED_CASES_LIST="" # 用于存储未通过的测例列表
|
||||
|
||||
# 显示帮助信息的函数
|
||||
show_help() {
|
||||
echo "用法: $0 [选项]"
|
||||
echo "此脚本用于编译 .sy 文件，并可选择性地运行它们进行测试。"
|
||||
echo "此脚本用于按文件名前缀数字升序编译和测试 .sy 文件。"
|
||||
echo ""
|
||||
echo "选项:"
|
||||
echo " -e, --executable 编译为可执行文件，运行可执行文件，并比较输出（如果存在 .in/.out 文件）。"
|
||||
echo " 如果 .out 文件的最后一行是整数，则将其视为期望的返回值进行比较，其余内容视为期望的标准输出。"
|
||||
echo " 如果 .out 文件的最后一行不是整数，则将整个 .out 文件视为期望的标准输出进行比较。"
|
||||
echo " 输出比较时会忽略行尾多余的换行符。"
|
||||
echo " 如果不存在 .in/.out 文件，则打印返回码。"
|
||||
echo " -c, --clean 清理 'tmp' 目录下的所有生成文件。"
|
||||
echo " -h, --help 显示此帮助信息并退出。"
|
||||
echo ""
|
||||
echo "编译步骤:"
|
||||
echo "1. 调用 sysyc 将 .sy 编译为 .s (RISC-V 汇编)。"
|
||||
echo "2. 调用 riscv64-linux-gnu-gcc 将 .s 编译为可执行文件，并链接 -L../lib/ -lsysy_riscv -static。"
|
||||
echo "3. 调用 qemu-riscv64 执行编译后的文件。"
|
||||
echo "4. 根据 .out 文件内容（最后一行是否为整数）决定是进行返回值比较、标准输出比较，或两者都进行。"
|
||||
echo "5. 如果没有 .in/.out 文件，则打印可执行文件的返回值。"
|
||||
echo " -e, --executable 编译为可执行文件并运行测试。"
|
||||
echo " -c, --clean 清理 'tmp' 目录下的所有生成文件。"
|
||||
echo " -sct N 设置 sysyc 编译超时为 N 秒 (默认: 10)。"
|
||||
echo " -gct N 设置 gcc 交叉编译超时为 N 秒 (默认: 10)。"
|
||||
echo " -et N 设置 qemu 执行超时为 N 秒 (默认: 5)。"
|
||||
echo " -h, --help 显示此帮助信息并退出。"
|
||||
}
|
||||
|
||||
# 清理临时文件的函数
|
||||
clean_tmp() {
|
||||
echo "正在清理临时目录: ${TMP_DIR}"
|
||||
rm -rf "${TMP_DIR}"/*
|
||||
# 如果需要，也可以根据 clean.sh 示例清理其他特定文件
|
||||
# rm -rf "${SCRIPT_DIR}"/*.s "${SCRIPT_DIR}"/*.ll "${SCRIPT_DIR}"/*clang "${SCRIPT_DIR}"/*sysyc
|
||||
# rm -rf "${SCRIPT_DIR}"/*_riscv64
|
||||
}
|
||||
|
||||
# 如果临时目录不存在，则创建它
|
||||
@ -58,12 +53,20 @@ while [[ "$#" -gt 0 ]]; do
|
||||
case "$1" in
|
||||
-e|--executable)
|
||||
EXECUTE_MODE=true
|
||||
shift
|
||||
;;
|
||||
-c|--clean)
|
||||
clean_tmp
|
||||
exit 0
|
||||
;;
|
||||
-sct)
|
||||
if [[ -n "$2" && "$2" =~ ^[0-9]+$ ]]; then SYSYC_TIMEOUT="$2"; shift; else echo "错误: -sct 需要一个正整数参数。" >&2; exit 1; fi
|
||||
;;
|
||||
-gct)
|
||||
if [[ -n "$2" && "$2" =~ ^[0-9]+$ ]]; then GCC_TIMEOUT="$2"; shift; else echo "错误: -gct 需要一个正整数参数。" >&2; exit 1; fi
|
||||
;;
|
||||
-et)
|
||||
if [[ -n "$2" && "$2" =~ ^[0-9]+$ ]]; then EXEC_TIMEOUT="$2"; shift; else echo "错误: -et 需要一个正整数参数。" >&2; exit 1; fi
|
||||
;;
|
||||
-h|--help)
|
||||
show_help
|
||||
exit 0
|
||||
@ -74,150 +77,175 @@ while [[ "$#" -gt 0 ]]; do
|
||||
exit 1
|
||||
;;
|
||||
esac
|
||||
shift
|
||||
done
|
||||
|
||||
echo "SysY 测试运行器启动..."
|
||||
echo "输入目录: ${TESTDATA_DIR}"
|
||||
echo "临时目录: ${TMP_DIR}"
|
||||
echo "执行模式已启用: ${EXECUTE_MODE}"
|
||||
echo "执行模式: ${EXECUTE_MODE}"
|
||||
if ${EXECUTE_MODE}; then
|
||||
echo "超时设置: sysyc=${SYSYC_TIMEOUT}s, gcc=${GCC_TIMEOUT}s, qemu=${EXEC_TIMEOUT}s"
|
||||
fi
|
||||
echo ""
|
||||
|
||||
# 查找 testdata 目录及其子目录中的所有 .sy 文件
|
||||
# 遍历找到的每个 .sy 文件
|
||||
find "${TESTDATA_DIR}" -name "*.sy" | while read sy_file; do
|
||||
# 获取 .sy 文件的基本名称（例如：21_if_test2）
|
||||
# 这也处理了文件位于子目录中的情况（例如：functional/21_if_test2.sy）
|
||||
# --- 修改点: 查找所有 .sy 文件并按文件名前缀数字排序 ---
|
||||
sy_files=$(find "${TESTDATA_DIR}" -name "*.sy" | sort -V)
|
||||
TOTAL_CASES=$(echo "$sy_files" | wc -w)
|
||||
|
||||
# --- 本次修复: 使用 here-string (<<<) 代替管道 (|) 来避免子 shell 问题 ---
|
||||
# 这样可以确保循环内的 PASSED_CASES 变量修改在循环结束后依然有效
|
||||
while IFS= read -r sy_file; do
|
||||
is_passed=1 # 1 表示通过, 0 表示失败
|
||||
|
||||
relative_path_no_ext=$(realpath --relative-to="${TESTDATA_DIR}" "${sy_file%.*}")
|
||||
# 将斜杠替换为下划线，用于输出文件名，以避免冲突并保持结构
|
||||
output_base_name=$(echo "${relative_path_no_ext}" | tr '/' '_')
|
||||
|
||||
# 定义汇编文件、可执行文件、输入文件和输出文件的路径
|
||||
assembly_file="${TMP_DIR}/${output_base_name}_sysyc_riscv64.s"
|
||||
executable_file="${TMP_DIR}/${output_base_name}_sysyc_riscv64"
|
||||
input_file="${sy_file%.*}.in"
|
||||
output_reference_file="${sy_file%.*}.out"
|
||||
output_actual_file="${TMP_DIR}/${output_base_name}_sysyc_riscv64.actual_out"
|
||||
|
||||
echo "正在处理: $(basename "$sy_file")"
|
||||
echo " SY 文件: ${sy_file}"
|
||||
echo "正在处理: $(basename "$sy_file") (路径: ${relative_path_no_ext}.sy)"
|
||||
|
||||
# 步骤 1: 使用 sysyc 编译 .sy 到 .s
|
||||
echo " 使用 sysyc 编译: ${SYSYC} -s asm \"${sy_file}\" > \"${assembly_file}\""
|
||||
"${SYSYC}" -s asm "${sy_file}" > "${assembly_file}"
|
||||
if [ $? -ne 0 ]; then
|
||||
echo -e "\e[31m错误: SysY 编译 ${sy_file} 失败\e[0m"
|
||||
echo " 使用 sysyc 编译 (超时 ${SYSYC_TIMEOUT}s)..."
|
||||
timeout ${SYSYC_TIMEOUT} "${SYSYC}" -S "${sy_file}" -o "${assembly_file}"
|
||||
SYSYC_STATUS=$?
|
||||
if [ $SYSYC_STATUS -eq 124 ]; then
|
||||
echo -e "\e[31m错误: SysY 编译 ${sy_file} 超时\e[0m"
|
||||
is_passed=0
|
||||
elif [ $SYSYC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[31m错误: SysY 编译 ${sy_file} 失败，退出码: ${SYSYC_STATUS}\e[0m"
|
||||
is_passed=0
|
||||
fi
|
||||
|
||||
# 只有当 EXECUTE_MODE 为 true 且上一步成功时才继续
|
||||
if ${EXECUTE_MODE} && [ "$is_passed" -eq 1 ]; then
|
||||
# 步骤 2: 使用 riscv64-linux-gnu-gcc 编译 .s 到可执行文件
|
||||
echo " 使用 gcc 编译 (超时 ${GCC_TIMEOUT}s)..."
|
||||
timeout ${GCC_TIMEOUT} "${GCC_RISCV64}" "${assembly_file}" -o "${executable_file}" -L"${LIB_DIR}" -lsysy_riscv -static
|
||||
GCC_STATUS=$?
|
||||
if [ $GCC_STATUS -eq 124 ]; then
|
||||
echo -e "\e[31m错误: GCC 编译 ${assembly_file} 超时\e[0m"
|
||||
is_passed=0
|
||||
elif [ $GCC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[31m错误: GCC 编译 ${assembly_file} 失败，退出码: ${GCC_STATUS}\e[0m"
|
||||
is_passed=0
|
||||
fi
|
||||
elif ! ${EXECUTE_MODE}; then
|
||||
echo " 跳过执行模式。仅生成汇编文件。"
|
||||
# 如果只编译不执行，只要编译成功就算通过
|
||||
if [ "$is_passed" -eq 1 ]; then
|
||||
((PASSED_CASES++))
|
||||
else
|
||||
# --- 本次修改点 ---
|
||||
FAILED_CASES_LIST+="${relative_path_no_ext}.sy\n"
|
||||
fi
|
||||
echo ""
|
||||
continue
|
||||
fi
|
||||
echo " 生成的汇编文件: ${assembly_file}"
|
||||
|
||||
# 只有当 EXECUTE_MODE 为 true 时才继续生成和执行可执行文件
|
||||
if ${EXECUTE_MODE}; then
|
||||
# 步骤 2: 使用 riscv64-linux-gnu-gcc 编译 .s 到可执行文件
|
||||
echo " 使用 gcc 编译: ${GCC_RISCV64} \"${assembly_file}\" -o \"${executable_file}\" -L\"${LIB_DIR}\" -lsysy_riscv -static"
|
||||
"${GCC_RISCV64}" "${assembly_file}" -o "${executable_file}" -L"${LIB_DIR}" -lsysy_riscv -static
|
||||
if [ $? -ne 0 ]; then
|
||||
echo -e "\e[31m错误: GCC 编译 ${assembly_file} 失败\e[0m"
|
||||
continue
|
||||
# 步骤 3, 4, 5: 只有当编译都成功时才执行
|
||||
if [ "$is_passed" -eq 1 ]; then
|
||||
echo " 正在执行 (超时 ${EXEC_TIMEOUT}s)..."
|
||||
|
||||
# 准备执行命令
|
||||
exec_cmd="${QEMU_RISCV64} \"${executable_file}\""
|
||||
if [ -f "${input_file}" ]; then
|
||||
exec_cmd+=" < \"${input_file}\""
|
||||
fi
|
||||
echo " 生成的可执行文件: ${executable_file}"
|
||||
exec_cmd+=" > \"${output_actual_file}\""
|
||||
|
||||
# 步骤 3, 4, 5: 执行编译后的文件并比较/报告结果
|
||||
echo " 正在执行: ${QEMU_RISCV664} \"${executable_file}\""
|
||||
# 执行并捕获返回码
|
||||
eval "timeout ${EXEC_TIMEOUT} ${exec_cmd}"
|
||||
ACTUAL_RETURN_CODE=$?
|
||||
|
||||
# 检查是否存在 .out 文件
|
||||
if [ -f "${output_reference_file}" ]; then
|
||||
# 尝试从 .out 文件中提取期望的返回码和期望的标准输出
|
||||
# 获取 .out 文件的最后一行，去除空白字符
|
||||
LAST_LINE_TRIMMED=$(tail -n 1 "${output_reference_file}" | tr -d '[:space:]')
|
||||
|
||||
# 检查最后一行是否为纯整数 (允许正负号)
|
||||
if [[ "$LAST_LINE_TRIMMED" =~ ^[-+]?[0-9]+$ ]]; then
|
||||
# 假设最后一行是期望的返回码
|
||||
EXPECTED_RETURN_CODE="$LAST_LINE_TRIMMED"
|
||||
|
||||
# 创建一个只包含期望标准输出的临时文件 (所有行除了最后一行)
|
||||
EXPECTED_STDOUT_FILE="${TMP_DIR}/${output_base_name}_sysyc_riscv64.expected_stdout"
|
||||
# 使用 head -n -1 来获取除了最后一行之外的所有行。如果文件只有一行，则生成一个空文件。
|
||||
head -n -1 "${output_reference_file}" > "${EXPECTED_STDOUT_FILE}"
|
||||
|
||||
echo " 检测到 .out 文件同时包含标准输出和期望的返回码。"
|
||||
echo " 期望返回码: ${EXPECTED_RETURN_CODE}"
|
||||
if [ -s "${EXPECTED_STDOUT_FILE}" ]; then # -s 检查文件是否非空
|
||||
echo " 期望标准输出文件: ${EXPECTED_STDOUT_FILE}"
|
||||
else
|
||||
echo " 期望标准输出为空。"
|
||||
fi
|
||||
|
||||
# 执行程序，捕获实际返回码和实际标准输出
|
||||
if [ -f "${input_file}" ]; then
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
"${QEMU_RISCV64}" "${executable_file}" < "${input_file}" > "${output_actual_file}"
|
||||
else
|
||||
"${QEMU_RISCV64}" "${executable_file}" > "${output_actual_file}"
|
||||
fi
|
||||
ACTUAL_RETURN_CODE=$? # 捕获执行状态
|
||||
|
||||
# 比较实际返回码与期望返回码
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq "$EXPECTED_RETURN_CODE" ]; then
|
||||
echo -e "\e[32m 返回码测试成功: ${sy_file} 的返回码 (${ACTUAL_RETURN_CODE}) 与期望值 (${EXPECTED_RETURN_CODE}) 匹配\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 返回码测试失败: ${sy_file} 的返回码不匹配。期望: ${EXPECTED_RETURN_CODE}, 实际: ${ACTUAL_RETURN_CODE}\e[0m"
|
||||
fi
|
||||
|
||||
# 比较实际标准输出与期望标准输出，忽略文件末尾的换行符差异
|
||||
# 使用 sed 命令去除文件末尾的所有换行符，再通过 diff 进行比较
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${EXPECTED_STDOUT_FILE}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 标准输出测试成功: 输出与 ${sy_file} 的参考输出匹配 (忽略行尾换行符差异)\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 标准输出测试失败: ${sy_file} 的输出不匹配\e[0m"
|
||||
echo " 差异 (可能包含行尾换行符差异):"
|
||||
diff "${output_actual_file}" "${EXPECTED_STDOUT_FILE}" # 显示原始差异以便调试
|
||||
fi
|
||||
|
||||
else
|
||||
# 最后一行不是纯整数，将整个 .out 文件视为纯标准输出
|
||||
echo " 检测到 .out 文件为纯标准输出参考。正在与输出文件比较: ${output_reference_file}"
|
||||
|
||||
# 使用输入文件（如果存在）运行可执行文件，并将输出重定向到临时文件
|
||||
if [ -f "${input_file}" ]; then
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
"${QEMU_RISCV64}" "${executable_file}" < "${input_file}" > "${output_actual_file}"
|
||||
else
|
||||
"${QEMU_RISCV64}" "${executable_file}" > "${output_actual_file}"
|
||||
fi
|
||||
EXEC_STATUS=$? # 捕获执行状态
|
||||
|
||||
if [ $EXEC_STATUS -ne 0 ]; then
|
||||
echo -e "\e[33m警告: 可执行文件 ${sy_file} 以非零状态 ${EXEC_STATUS} 退出 (纯输出比较模式)。请检查程序逻辑或其是否应返回此状态。\e[0m"
|
||||
fi
|
||||
|
||||
# 比较实际输出与参考输出，忽略文件末尾的换行符差异
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${output_reference_file}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 成功: 输出与 ${sy_file} 的参考输出匹配 (忽略行尾换行符差异)\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 失败: ${sy_file} 的输出不匹配\e[0m"
|
||||
echo " 差异 (可能包含行尾换行符差异):"
|
||||
diff "${output_actual_file}" "${output_reference_file}" # 显示原始差异以便调试
|
||||
fi
|
||||
fi
|
||||
elif [ -f "${input_file}" ]; then
|
||||
# 只有 .in 文件存在，使用输入运行并报告退出码（无参考输出）
|
||||
echo " 使用输入文件: ${input_file}"
|
||||
echo " 没有 .out 文件进行比较。正在运行并报告返回码。"
|
||||
"${QEMU_RISCV64}" "${executable_file}" < "${input_file}"
|
||||
EXEC_STATUS=$?
|
||||
echo " ${sy_file} 的返回码: ${EXEC_STATUS}"
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq 124 ]; then
|
||||
echo -e "\e[31m 执行超时: ${sy_file} 运行超过 ${EXEC_TIMEOUT} 秒\e[0m"
|
||||
is_passed=0
|
||||
else
|
||||
# .in 和 .out 文件都不存在，只运行并报告退出码
|
||||
echo " 未找到 .in 或 .out 文件。正在运行并报告返回码。"
|
||||
"${QEMU_RISCV64}" "${executable_file}"
|
||||
EXEC_STATUS=$?
|
||||
echo " ${sy_file} 的返回码: ${EXEC_STATUS}"
|
||||
fi
|
||||
else
|
||||
echo " 跳过执行模式。仅生成汇编文件。"
|
||||
fi
|
||||
echo "" # 为测试用例之间添加一个空行，以提高可读性
|
||||
done
|
||||
# 检查是否存在 .out 文件以进行比较
|
||||
if [ -f "${output_reference_file}" ]; then
|
||||
LAST_LINE_TRIMMED=$(tail -n 1 "${output_reference_file}" | tr -d '[:space:]')
|
||||
|
||||
if [[ "$LAST_LINE_TRIMMED" =~ ^[-+]?[0-9]+$ ]]; then
|
||||
EXPECTED_RETURN_CODE="$LAST_LINE_TRIMMED"
|
||||
EXPECTED_STDOUT_FILE="${TMP_DIR}/${output_base_name}_sysyc_riscv64.expected_stdout"
|
||||
head -n -1 "${output_reference_file}" > "${EXPECTED_STDOUT_FILE}"
|
||||
|
||||
echo "脚本完成。"
|
||||
# 比较返回码
|
||||
if [ "$ACTUAL_RETURN_CODE" -eq "$EXPECTED_RETURN_CODE" ]; then
|
||||
echo -e "\e[32m 返回码测试成功: (${ACTUAL_RETURN_CODE}) 与期望值 (${EXPECTED_RETURN_CODE}) 匹配\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 返回码测试失败: 期望: ${EXPECTED_RETURN_CODE}, 实际: ${ACTUAL_RETURN_CODE}\e[0m"
|
||||
is_passed=0
|
||||
fi
|
||||
# 比较标准输出
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${EXPECTED_STDOUT_FILE}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 标准输出测试成功\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 标准输出测试失败\e[0m"
|
||||
is_passed=0
|
||||
echo -e " \e[36m---------- 期望输出 ----------\e[0m"
|
||||
cat "${EXPECTED_STDOUT_FILE}"
|
||||
echo -e " \e[36m---------- 实际输出 ----------\e[0m"
|
||||
cat "${output_actual_file}"
|
||||
echo -e " \e[36m------------------------------\e[0m"
|
||||
fi
|
||||
else
|
||||
# 纯标准输出比较
|
||||
if [ $ACTUAL_RETURN_CODE -ne 0 ]; then
|
||||
echo -e "\e[33m警告: 程序以非零状态 ${ACTUAL_RETURN_CODE} 退出 (纯输出比较模式)。\e[0m"
|
||||
fi
|
||||
if diff -q <(sed ':a;N;$!ba;s/\n*$//' "${output_actual_file}") <(sed ':a;N;$!ba;s/\n*$//' "${output_reference_file}") >/dev/null 2>&1; then
|
||||
echo -e "\e[32m 成功: 输出与参考输出匹配\e[0m"
|
||||
else
|
||||
echo -e "\e[31m 失败: 输出不匹配\e[0m"
|
||||
is_passed=0
|
||||
echo -e " \e[36m---------- 期望输出 ----------\e[0m"
|
||||
cat "${output_reference_file}"
|
||||
echo -e " \e[36m---------- 实际输出 ----------\e[0m"
|
||||
cat "${output_actual_file}"
|
||||
echo -e " \e[36m------------------------------\e[0m"
|
||||
fi
|
||||
fi
|
||||
else
|
||||
# 没有 .out 文件，只报告返回码
|
||||
echo " 无参考输出文件。程序返回码: ${ACTUAL_RETURN_CODE}"
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
|
||||
# 更新通过用例计数
|
||||
# --- 本次修改点 ---
|
||||
if [ "$is_passed" -eq 1 ]; then
|
||||
((PASSED_CASES++))
|
||||
else
|
||||
# 将失败的用例名称添加到列表中
|
||||
FAILED_CASES_LIST+="${relative_path_no_ext}.sy\n"
|
||||
fi
|
||||
echo "" # 添加空行以提高可读性
|
||||
done <<< "$sy_files"
|
||||
|
||||
# --- 新增功能: 打印最终总结 ---
|
||||
echo "========================================"
|
||||
echo "测试完成"
|
||||
echo "测试通过率: [${PASSED_CASES}/${TOTAL_CASES}]"
|
||||
|
||||
# --- 本次修改点: 打印未通过的测例列表 ---
|
||||
if [ -n "$FAILED_CASES_LIST" ]; then
|
||||
echo ""
|
||||
echo -e "\e[31m未通过的测例:\e[0m"
|
||||
# 使用 -e 来解释换行符 \n
|
||||
echo -e "${FAILED_CASES_LIST}"
|
||||
fi
|
||||
|
||||
echo "========================================"
|
||||
|
||||
if [ "$PASSED_CASES" -eq "$TOTAL_CASES" ]; then
|
||||
exit 0
|
||||
else
|
||||
exit 1
|
||||
fi
|
||||
|
||||
1
testdata/functional/00_main.out
vendored
Normal file
1
testdata/functional/00_main.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
3
|
||||
3
testdata/functional/00_main.sy
vendored
Normal file
3
testdata/functional/00_main.sy
vendored
Normal file
@ -0,0 +1,3 @@
|
||||
int main(){
|
||||
return 3;
|
||||
}
|
||||
1
testdata/performance/2024-C64-14.out → testdata/functional/01_var_defn2.out
vendored
Executable file → Normal file
1
testdata/performance/2024-C64-14.out → testdata/functional/01_var_defn2.out
vendored
Executable file → Normal file
@ -1,2 +1 @@
|
||||
10
|
||||
0
|
||||
8
testdata/functional/01_var_defn2.sy
vendored
Normal file
8
testdata/functional/01_var_defn2.sy
vendored
Normal file
@ -0,0 +1,8 @@
|
||||
//test domain of global var define and local define
|
||||
int a = 3;
|
||||
int b = 5;
|
||||
|
||||
int main(){
|
||||
int a = 5;
|
||||
return a + b;
|
||||
}
|
||||
1
testdata/functional/02_var_defn3.out
vendored
Normal file
1
testdata/functional/02_var_defn3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
5
|
||||
8
testdata/functional/02_var_defn3.sy
vendored
Normal file
8
testdata/functional/02_var_defn3.sy
vendored
Normal file
@ -0,0 +1,8 @@
|
||||
//test local var define
|
||||
int main(){
|
||||
int a, b0, _c;
|
||||
a = 1;
|
||||
b0 = 2;
|
||||
_c = 3;
|
||||
return b0 + _c;
|
||||
}
|
||||
1
testdata/functional/03_arr_defn2.out
vendored
Normal file
1
testdata/functional/03_arr_defn2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
0
|
||||
4
testdata/functional/03_arr_defn2.sy
vendored
Normal file
4
testdata/functional/03_arr_defn2.sy
vendored
Normal file
@ -0,0 +1,4 @@
|
||||
int a[10][10];
|
||||
int main(){
|
||||
return 0;
|
||||
}
|
||||
1
testdata/functional/04_arr_defn3.out
vendored
Normal file
1
testdata/functional/04_arr_defn3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
14
|
||||
9
testdata/functional/04_arr_defn3.sy
vendored
Normal file
9
testdata/functional/04_arr_defn3.sy
vendored
Normal file
@ -0,0 +1,9 @@
|
||||
//test array define
|
||||
int main(){
|
||||
int a[4][2] = {};
|
||||
int b[4][2] = {1, 2, 3, 4, 5, 6, 7, 8};
|
||||
int c[4][2] = {{1, 2}, {3, 4}, {5, 6}, {7, 8}};
|
||||
int d[4][2] = {1, 2, {3}, {5}, 7 , 8};
|
||||
int e[4][2] = {{d[2][1], c[2][1]}, {3, 4}, {5, 6}, {7, 8}};
|
||||
return e[3][1] + e[0][0] + e[0][1] + a[2][0];
|
||||
}
|
||||
1
testdata/functional/05_arr_defn4.out
vendored
Normal file
1
testdata/functional/05_arr_defn4.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
21
|
||||
9
testdata/functional/05_arr_defn4.sy
vendored
Normal file
9
testdata/functional/05_arr_defn4.sy
vendored
Normal file
@ -0,0 +1,9 @@
|
||||
int main(){
|
||||
const int a[4][2] = {{1, 2}, {3, 4}, {}, 7};
|
||||
|
||||
int b[4][2] = {};
|
||||
int c[4][2] = {1, 2, 3, 4, 5, 6, 7, 8};
|
||||
int d[3 + 1][2] = {1, 2, {3}, {5}, a[3][0], 8};
|
||||
int e[4][2][1] = {{d[2][1], {c[2][1]}}, {3, 4}, {5, 6}, {7, 8}};
|
||||
return e[3][1][0] + e[0][0][0] + e[0][1][0] + d[3][0];
|
||||
}
|
||||
1
testdata/functional/06_const_var_defn2.out
vendored
Normal file
1
testdata/functional/06_const_var_defn2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
5
|
||||
6
testdata/functional/06_const_var_defn2.sy
vendored
Normal file
6
testdata/functional/06_const_var_defn2.sy
vendored
Normal file
@ -0,0 +1,6 @@
|
||||
//test const gloal var define
|
||||
const int a = 10, b = 5;
|
||||
|
||||
int main(){
|
||||
return b;
|
||||
}
|
||||
1
testdata/functional/07_const_var_defn3.out
vendored
Normal file
1
testdata/functional/07_const_var_defn3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
5
|
||||
5
testdata/functional/07_const_var_defn3.sy
vendored
Normal file
5
testdata/functional/07_const_var_defn3.sy
vendored
Normal file
@ -0,0 +1,5 @@
|
||||
//test const local var define
|
||||
int main(){
|
||||
const int a = 10, b = 5;
|
||||
return b;
|
||||
}
|
||||
1
testdata/functional/08_const_array_defn.out
vendored
Normal file
1
testdata/functional/08_const_array_defn.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
4
|
||||
5
testdata/functional/08_const_array_defn.sy
vendored
Normal file
5
testdata/functional/08_const_array_defn.sy
vendored
Normal file
@ -0,0 +1,5 @@
|
||||
const int a[5]={0,1,2,3,4};
|
||||
|
||||
int main(){
|
||||
return a[4];
|
||||
}
|
||||
1
testdata/functional/09_func_defn.out
vendored
Normal file
1
testdata/functional/09_func_defn.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
9
|
||||
11
testdata/functional/09_func_defn.sy
vendored
Normal file
11
testdata/functional/09_func_defn.sy
vendored
Normal file
@ -0,0 +1,11 @@
|
||||
int a;
|
||||
int func(int p){
|
||||
p = p - 1;
|
||||
return p;
|
||||
}
|
||||
int main(){
|
||||
int b;
|
||||
a = 10;
|
||||
b = func(a);
|
||||
return b;
|
||||
}
|
||||
1
testdata/functional/10_var_defn_func.out
vendored
Normal file
1
testdata/functional/10_var_defn_func.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
4
|
||||
8
testdata/functional/10_var_defn_func.sy
vendored
Normal file
8
testdata/functional/10_var_defn_func.sy
vendored
Normal file
@ -0,0 +1,8 @@
|
||||
int defn(){
|
||||
return 4;
|
||||
}
|
||||
|
||||
int main(){
|
||||
int a=defn();
|
||||
return a;
|
||||
}
|
||||
1
testdata/functional/11_add2.out
vendored
Normal file
1
testdata/functional/11_add2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
9
|
||||
7
testdata/functional/11_add2.sy
vendored
Normal file
7
testdata/functional/11_add2.sy
vendored
Normal file
@ -0,0 +1,7 @@
|
||||
//test add
|
||||
int main(){
|
||||
int a, b;
|
||||
a = 10;
|
||||
b = -1;
|
||||
return a + b;
|
||||
}
|
||||
1
testdata/functional/12_addc.out
vendored
Normal file
1
testdata/functional/12_addc.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
15
|
||||
5
testdata/functional/12_addc.sy
vendored
Normal file
5
testdata/functional/12_addc.sy
vendored
Normal file
@ -0,0 +1,5 @@
|
||||
//test addc
|
||||
const int a = 10;
|
||||
int main(){
|
||||
return a + 5;
|
||||
}
|
||||
1
testdata/functional/13_sub2.out
vendored
Normal file
1
testdata/functional/13_sub2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
248
|
||||
7
testdata/functional/13_sub2.sy
vendored
Normal file
7
testdata/functional/13_sub2.sy
vendored
Normal file
@ -0,0 +1,7 @@
|
||||
//test sub
|
||||
const int a = 10;
|
||||
int main(){
|
||||
int b;
|
||||
b = 2;
|
||||
return b - a;
|
||||
}
|
||||
1
testdata/functional/14_subc.out
vendored
Normal file
1
testdata/functional/14_subc.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
8
|
||||
6
testdata/functional/14_subc.sy
vendored
Normal file
6
testdata/functional/14_subc.sy
vendored
Normal file
@ -0,0 +1,6 @@
|
||||
//test subc
|
||||
int main(){
|
||||
int a;
|
||||
a = 10;
|
||||
return a - 2;
|
||||
}
|
||||
1
testdata/functional/15_mul.out
vendored
Normal file
1
testdata/functional/15_mul.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
50
|
||||
7
testdata/functional/15_mul.sy
vendored
Normal file
7
testdata/functional/15_mul.sy
vendored
Normal file
@ -0,0 +1,7 @@
|
||||
//test mul
|
||||
int main(){
|
||||
int a, b;
|
||||
a = 10;
|
||||
b = 5;
|
||||
return a * b;
|
||||
}
|
||||
1
testdata/functional/16_mulc.out
vendored
Normal file
1
testdata/functional/16_mulc.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
25
|
||||
5
testdata/functional/16_mulc.sy
vendored
Normal file
5
testdata/functional/16_mulc.sy
vendored
Normal file
@ -0,0 +1,5 @@
|
||||
//test mulc
|
||||
const int a = 5;
|
||||
int main(){
|
||||
return a * 5;
|
||||
}
|
||||
1
testdata/functional/17_div.out
vendored
Normal file
1
testdata/functional/17_div.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
2
|
||||
7
testdata/functional/17_div.sy
vendored
Normal file
7
testdata/functional/17_div.sy
vendored
Normal file
@ -0,0 +1,7 @@
|
||||
//test div
|
||||
int main(){
|
||||
int a, b;
|
||||
a = 10;
|
||||
b = 5;
|
||||
return a / b;
|
||||
}
|
||||
1
testdata/functional/18_divc.out
vendored
Normal file
1
testdata/functional/18_divc.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
2
|
||||
5
testdata/functional/18_divc.sy
vendored
Normal file
5
testdata/functional/18_divc.sy
vendored
Normal file
@ -0,0 +1,5 @@
|
||||
//test divc
|
||||
const int a = 10;
|
||||
int main(){
|
||||
return a / 5;
|
||||
}
|
||||
1
testdata/functional/19_mod.out
vendored
Normal file
1
testdata/functional/19_mod.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
3
|
||||
6
testdata/functional/19_mod.sy
vendored
Normal file
6
testdata/functional/19_mod.sy
vendored
Normal file
@ -0,0 +1,6 @@
|
||||
//test mod
|
||||
int main(){
|
||||
int a;
|
||||
a = 10;
|
||||
return a / 3;
|
||||
}
|
||||
1
testdata/functional/20_rem.out
vendored
Normal file
1
testdata/functional/20_rem.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
1
|
||||
6
testdata/functional/20_rem.sy
vendored
Normal file
6
testdata/functional/20_rem.sy
vendored
Normal file
@ -0,0 +1,6 @@
|
||||
//test rem
|
||||
int main(){
|
||||
int a;
|
||||
a = 10;
|
||||
return a % 3;
|
||||
}
|
||||
0
testdata/functional/21_if_test2.out
vendored
Executable file → Normal file
0
testdata/functional/21_if_test2.out
vendored
Executable file → Normal file
0
testdata/functional/21_if_test2.sy
vendored
Executable file → Normal file
0
testdata/functional/21_if_test2.sy
vendored
Executable file → Normal file
1
testdata/functional/22_if_test3.out
vendored
Normal file
1
testdata/functional/22_if_test3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
25
|
||||
18
testdata/functional/22_if_test3.sy
vendored
Normal file
18
testdata/functional/22_if_test3.sy
vendored
Normal file
@ -0,0 +1,18 @@
|
||||
// test if-if-else
|
||||
int ififElse() {
|
||||
int a;
|
||||
a = 5;
|
||||
int b;
|
||||
b = 10;
|
||||
if(a == 5)
|
||||
if (b == 10)
|
||||
a = 25;
|
||||
else
|
||||
a = a + 15;
|
||||
|
||||
return (a);
|
||||
}
|
||||
|
||||
int main(){
|
||||
return (ififElse());
|
||||
}
|
||||
1
testdata/functional/23_if_test4.out
vendored
Normal file
1
testdata/functional/23_if_test4.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
25
|
||||
18
testdata/functional/23_if_test4.sy
vendored
Normal file
18
testdata/functional/23_if_test4.sy
vendored
Normal file
@ -0,0 +1,18 @@
|
||||
// test if-{if-else}
|
||||
int if_ifElse_() {
|
||||
int a;
|
||||
a = 5;
|
||||
int b;
|
||||
b = 10;
|
||||
if(a == 5){
|
||||
if (b == 10)
|
||||
a = 25;
|
||||
else
|
||||
a = a + 15;
|
||||
}
|
||||
return (a);
|
||||
}
|
||||
|
||||
int main(){
|
||||
return (if_ifElse_());
|
||||
}
|
||||
1
testdata/functional/24_if_test5.out
vendored
Normal file
1
testdata/functional/24_if_test5.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
25
|
||||
18
testdata/functional/24_if_test5.sy
vendored
Normal file
18
testdata/functional/24_if_test5.sy
vendored
Normal file
@ -0,0 +1,18 @@
|
||||
// test if-{if}-else
|
||||
int if_if_Else() {
|
||||
int a;
|
||||
a = 5;
|
||||
int b;
|
||||
b = 10;
|
||||
if(a == 5){
|
||||
if (b == 10)
|
||||
a = 25;
|
||||
}
|
||||
else
|
||||
a = a + 15;
|
||||
return (a);
|
||||
}
|
||||
|
||||
int main(){
|
||||
return (if_if_Else());
|
||||
}
|
||||
2
testdata/functional/25_while_if.out
vendored
Normal file
2
testdata/functional/25_while_if.out
vendored
Normal file
@ -0,0 +1,2 @@
|
||||
88
|
||||
0
|
||||
31
testdata/functional/25_while_if.sy
vendored
Normal file
31
testdata/functional/25_while_if.sy
vendored
Normal file
@ -0,0 +1,31 @@
|
||||
int get_one(int a) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
int deepWhileBr(int a, int b) {
|
||||
int c;
|
||||
c = a + b;
|
||||
while (c < 75) {
|
||||
int d;
|
||||
d = 42;
|
||||
if (c < 100) {
|
||||
c = c + d;
|
||||
if (c > 99) {
|
||||
int e;
|
||||
e = d * 2;
|
||||
if (get_one(0) == 1) {
|
||||
c = e * 2;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (c);
|
||||
}
|
||||
|
||||
int main() {
|
||||
int p;
|
||||
p = 2;
|
||||
p = deepWhileBr(p, p);
|
||||
putint(p);
|
||||
return 0;
|
||||
}
|
||||
0
testdata/functional/26_while_test1.out
vendored
Executable file → Normal file
0
testdata/functional/26_while_test1.out
vendored
Executable file → Normal file
0
testdata/functional/26_while_test1.sy
vendored
Executable file → Normal file
0
testdata/functional/26_while_test1.sy
vendored
Executable file → Normal file
1
testdata/functional/27_while_test2.out
vendored
Normal file
1
testdata/functional/27_while_test2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
54
|
||||
31
testdata/functional/27_while_test2.sy
vendored
Normal file
31
testdata/functional/27_while_test2.sy
vendored
Normal file
@ -0,0 +1,31 @@
|
||||
int FourWhile() {
|
||||
int a;
|
||||
a = 5;
|
||||
int b;
|
||||
int c;
|
||||
b = 6;
|
||||
c = 7;
|
||||
int d;
|
||||
d = 10;
|
||||
while (a < 20) {
|
||||
a = a + 3;
|
||||
while(b < 10){
|
||||
b = b + 1;
|
||||
while(c == 7){
|
||||
c = c - 1;
|
||||
while(d < 20){
|
||||
d = d + 3;
|
||||
}
|
||||
d = d - 1;
|
||||
}
|
||||
c = c + 1;
|
||||
}
|
||||
b = b - 2;
|
||||
}
|
||||
|
||||
return (a + (b + d) + c);
|
||||
}
|
||||
|
||||
int main() {
|
||||
return FourWhile();
|
||||
}
|
||||
1
testdata/functional/28_while_test3.out
vendored
Normal file
1
testdata/functional/28_while_test3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
23
|
||||
55
testdata/functional/28_while_test3.sy
vendored
Normal file
55
testdata/functional/28_while_test3.sy
vendored
Normal file
@ -0,0 +1,55 @@
|
||||
int g;
|
||||
int h;
|
||||
int f;
|
||||
int e;
|
||||
int EightWhile() {
|
||||
int a;
|
||||
a = 5;
|
||||
int b;
|
||||
int c;
|
||||
b = 6;
|
||||
c = 7;
|
||||
int d;
|
||||
d = 10;
|
||||
while (a < 20) {
|
||||
a = a + 3;
|
||||
while(b < 10){
|
||||
b = b + 1;
|
||||
while(c == 7){
|
||||
c = c - 1;
|
||||
while(d < 20){
|
||||
d = d + 3;
|
||||
while(e > 1){
|
||||
e = e-1;
|
||||
while(f > 2){
|
||||
f = f -2;
|
||||
while(g < 3){
|
||||
g = g +10;
|
||||
while(h < 10){
|
||||
h = h + 8;
|
||||
}
|
||||
h = h-1;
|
||||
}
|
||||
g = g- 8;
|
||||
}
|
||||
f = f + 1;
|
||||
}
|
||||
e = e + 1;
|
||||
}
|
||||
d = d - 1;
|
||||
}
|
||||
c = c + 1;
|
||||
}
|
||||
b = b - 2;
|
||||
}
|
||||
|
||||
return (a + (b + d) + c)-(e + d - g + h);
|
||||
}
|
||||
|
||||
int main() {
|
||||
g = 1;
|
||||
h = 2;
|
||||
e = 4;
|
||||
f = 6;
|
||||
return EightWhile();
|
||||
}
|
||||
1
testdata/functional/29_break.out
vendored
Normal file
1
testdata/functional/29_break.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
201
|
||||
15
testdata/functional/29_break.sy
vendored
Normal file
15
testdata/functional/29_break.sy
vendored
Normal file
@ -0,0 +1,15 @@
|
||||
//test break
|
||||
int main(){
|
||||
int i;
|
||||
i = 0;
|
||||
int sum;
|
||||
sum = 0;
|
||||
while(i < 100){
|
||||
if(i == 50){
|
||||
break;
|
||||
}
|
||||
sum = sum + i;
|
||||
i = i + 1;
|
||||
}
|
||||
return sum;
|
||||
}
|
||||
1
testdata/functional/30_continue.out
vendored
Normal file
1
testdata/functional/30_continue.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
36
|
||||
16
testdata/functional/30_continue.sy
vendored
Normal file
16
testdata/functional/30_continue.sy
vendored
Normal file
@ -0,0 +1,16 @@
|
||||
//test continue
|
||||
int main(){
|
||||
int i;
|
||||
i = 0;
|
||||
int sum;
|
||||
sum = 0;
|
||||
while(i < 100){
|
||||
if(i == 50){
|
||||
i = i + 1;
|
||||
continue;
|
||||
}
|
||||
sum = sum + i;
|
||||
i = i + 1;
|
||||
}
|
||||
return sum;
|
||||
}
|
||||
1
testdata/functional/31_while_if_test1.out
vendored
Normal file
1
testdata/functional/31_while_if_test1.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
198
|
||||
25
testdata/functional/31_while_if_test1.sy
vendored
Normal file
25
testdata/functional/31_while_if_test1.sy
vendored
Normal file
@ -0,0 +1,25 @@
|
||||
// test while-if
|
||||
int whileIf() {
|
||||
int a;
|
||||
a = 0;
|
||||
int b;
|
||||
b = 0;
|
||||
while (a < 100) {
|
||||
if (a == 5) {
|
||||
b = 25;
|
||||
}
|
||||
else if (a == 10) {
|
||||
b = 42;
|
||||
}
|
||||
else {
|
||||
b = a * 2;
|
||||
}
|
||||
a = a + 1;
|
||||
}
|
||||
return (b);
|
||||
}
|
||||
|
||||
|
||||
int main(){
|
||||
return (whileIf());
|
||||
}
|
||||
1
testdata/functional/32_while_if_test2.out
vendored
Normal file
1
testdata/functional/32_while_if_test2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
96
|
||||
23
testdata/functional/32_while_if_test2.sy
vendored
Normal file
23
testdata/functional/32_while_if_test2.sy
vendored
Normal file
@ -0,0 +1,23 @@
|
||||
int ifWhile() {
|
||||
int a;
|
||||
a = 0;
|
||||
int b;
|
||||
b = 3;
|
||||
if (a == 5) {
|
||||
while(b == 2){
|
||||
b = b + 2;
|
||||
}
|
||||
b = b + 25;
|
||||
}
|
||||
else
|
||||
while (a < 5) {
|
||||
b = b * 2;
|
||||
a = a + 1;
|
||||
}
|
||||
return (b);
|
||||
}
|
||||
|
||||
|
||||
int main(){
|
||||
return (ifWhile());
|
||||
}
|
||||
1
testdata/functional/33_while_if_test3.out
vendored
Normal file
1
testdata/functional/33_while_if_test3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
88
|
||||
25
testdata/functional/33_while_if_test3.sy
vendored
Normal file
25
testdata/functional/33_while_if_test3.sy
vendored
Normal file
@ -0,0 +1,25 @@
|
||||
int deepWhileBr(int a, int b) {
|
||||
int c;
|
||||
c = a + b;
|
||||
while (c < 75) {
|
||||
int d;
|
||||
d = 42;
|
||||
if (c < 100) {
|
||||
c = c + d;
|
||||
if (c > 99) {
|
||||
int e;
|
||||
e = d * 2;
|
||||
if (1 == 1) {
|
||||
c = e * 2;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
return (c);
|
||||
}
|
||||
|
||||
int main() {
|
||||
int p;
|
||||
p = 2;
|
||||
return deepWhileBr(p, p);
|
||||
}
|
||||
1
testdata/functional/34_arr_expr_len.out
vendored
Normal file
1
testdata/functional/34_arr_expr_len.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
51
|
||||
11
testdata/functional/34_arr_expr_len.sy
vendored
Normal file
11
testdata/functional/34_arr_expr_len.sy
vendored
Normal file
@ -0,0 +1,11 @@
|
||||
//const int N = -1;
|
||||
int arr[-1 + 2 * 4 - 99 / 99] = {1, 2, 33, 4, 5, 6};
|
||||
|
||||
int main() {
|
||||
int i = 0, sum = 0;
|
||||
while (i < 6) {
|
||||
sum = sum + arr[i];
|
||||
i = i + 1;
|
||||
}
|
||||
return sum;
|
||||
}
|
||||
0
testdata/functional/35_op_priority1.out
vendored
Executable file → Normal file
0
testdata/functional/35_op_priority1.out
vendored
Executable file → Normal file
0
testdata/functional/35_op_priority1.sy
vendored
Executable file → Normal file
0
testdata/functional/35_op_priority1.sy
vendored
Executable file → Normal file
1
testdata/functional/36_op_priority2.out
vendored
Normal file
1
testdata/functional/36_op_priority2.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
24
|
||||
9
testdata/functional/36_op_priority2.sy
vendored
Normal file
9
testdata/functional/36_op_priority2.sy
vendored
Normal file
@ -0,0 +1,9 @@
|
||||
//test the priority of add and mul
|
||||
int main(){
|
||||
int a, b, c, d;
|
||||
a = 10;
|
||||
b = 4;
|
||||
c = 2;
|
||||
d = 2;
|
||||
return (c + a) * (b - d);
|
||||
}
|
||||
1
testdata/functional/37_op_priority3.out
vendored
Normal file
1
testdata/functional/37_op_priority3.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
40
|
||||
7
testdata/functional/37_op_priority3.sy
vendored
Normal file
7
testdata/functional/37_op_priority3.sy
vendored
Normal file
@ -0,0 +1,7 @@
|
||||
//test the priority of unary operator and binary operator
|
||||
int main(){
|
||||
int a, b;
|
||||
a = 10;
|
||||
b = 30;
|
||||
return a - -5 + b + -5;
|
||||
}
|
||||
1
testdata/functional/38_op_priority4.in
vendored
Normal file
1
testdata/functional/38_op_priority4.in
vendored
Normal file
@ -0,0 +1 @@
|
||||
0 1 1 1 1
|
||||
1
testdata/functional/38_op_priority4.out
vendored
Normal file
1
testdata/functional/38_op_priority4.out
vendored
Normal file
@ -0,0 +1 @@
|
||||
1
|
||||
19
testdata/functional/38_op_priority4.sy
vendored
Normal file
19
testdata/functional/38_op_priority4.sy
vendored
Normal file
@ -0,0 +1,19 @@
|
||||
int a;
|
||||
int b;
|
||||
int c;
|
||||
int d;
|
||||
int e;
|
||||
int main()
|
||||
{
|
||||
a=getint();
|
||||
b=getint();
|
||||
c=getint();
|
||||
d=getint();
|
||||
e=getint();
|
||||
int flag=0;
|
||||
if(a-b*c!=d-a/c||a*b/c==e+d||a+b+c==d+e)
|
||||
{
|
||||
flag=1;
|
||||
}
|
||||
return flag;
|
||||
}
|
||||
2
testdata/functional/39_op_priority5.out
vendored
Normal file
2
testdata/functional/39_op_priority5.out
vendored
Normal file
@ -0,0 +1,2 @@
|
||||
1
|
||||
1
|
||||
15
testdata/functional/39_op_priority5.sy
vendored
Normal file
15
testdata/functional/39_op_priority5.sy
vendored
Normal file
@ -0,0 +1,15 @@
|
||||
int a = 1;
|
||||
int b = 0;
|
||||
int c = 1;
|
||||
int d = 2;
|
||||
int e = 4;
|
||||
int main()
|
||||
{
|
||||
int flag=0;
|
||||
if(a * b / c == e + d && a * (a + b) + c <= d + e || a - (b * c) == d - a / c)
|
||||
{
|
||||
flag=1;
|
||||
}
|
||||
putint(flag);
|
||||
return flag;
|
||||
}
|
||||
0
testdata/functional/40_unary_op.out
vendored
Executable file → Normal file
0
testdata/functional/40_unary_op.out
vendored
Executable file → Normal file
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user