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009f54863e
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[CFG]CFG优化方法转换为静态方法，方便其他优化遍调用，TODO：简化条件分支
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2025-07-17 15:54:37 +08:00 |
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f7e318e623
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[SCCP]初步构建SCCP，.cpp仍不完善暂不commit
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2025-07-16 22:01:37 +08:00 |
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00348c1931
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修改CFG优化的文件名，修改phidel标签
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2025-07-16 22:01:37 +08:00 |
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5a6cfbee1e
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[SysYIROptUtils]增加通用优化工具类，修改相关代码
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2025-07-16 22:01:37 +08:00 |
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f4d599a567
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Merge remote-tracking branch 'origin/loopinfo'
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2025-07-16 13:17:32 +08:00 |
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50fd9cffe9
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[IRPrinter&DCE]修改定义方便调试打印，在DEC中增加调试信息
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2025-07-16 13:04:05 +08:00 |
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3ce6cd086a
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Merge branch 'master' of https://gitlab.eduxiji.net/T202590002206578/mysysy
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2025-07-16 12:49:46 +08:00 |
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1727e7259b
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添加了项目部署脚本，修改了ReadMe
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2025-07-16 12:16:52 +08:00 |
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8c80b732f3
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[deploy]修正了本地不能通过编译的bug，大幅修改了主函数，使之支持云平台测试参数
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2025-07-16 11:18:43 +08:00 |
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bd7f6ea6f6
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[deploy]移除了Backend.h和.cpp
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2025-07-16 10:37:19 +08:00 |
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bb1602aa5f
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[deploy]把Antlr生成的代码直接放到源代码文件夹中
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2025-07-16 10:32:18 +08:00 |
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b08b7d9fa6
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[deploy]移除了导致编译错误的Antlr目录
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2025-07-16 10:07:09 +08:00 |
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c5fa366108
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[deploy]移除了导致编译错误的旧版本Antlr目录
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2025-07-16 09:44:28 +08:00 |
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2de16da306
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binary name changed to compiler
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2025-07-16 02:06:19 +08:00 |
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e33a926562
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Merge branch 'backend'
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2025-07-15 15:04:20 +08:00 |
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3419f84898
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Merge remote-tracking branch 'origin/backend' into loopinfo
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2025-07-15 13:09:55 +08:00 |
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ede6465e8c
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[IR]:增加默认添加ret指令逻辑
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2025-07-15 12:53:03 +08:00 |
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a509dabbf0
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[backend]解决了数组访存地址计算问题，加入了参数控制的中端、后端调试选项
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2025-07-15 11:32:53 +08:00 |
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11f45be21e
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修复了虚拟机内测试脚本的格式问题
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2025-07-14 18:07:20 +08:00 |
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e576f0a21e
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Merge remote-tracking branch 'origin/DCE' into backend
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2025-06-27 22:44:08 +08:00 |
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34ffa39b8a
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[backend] modified some comments and created a shell srcipt for test inside riscv64-vms
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2025-06-25 20:59:40 +08:00 |
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d06c5efae1
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[backend] fixed bugs of deadcode elimation
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2025-06-25 18:56:08 +08:00 |
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019cb6dc0d
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[backend] debugging array
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2025-06-25 17:07:37 +08:00 |
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d9fa9e787a
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删除注释
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2025-06-25 16:33:43 +08:00 |
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97410d9417
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删除调试信息输出
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2025-06-25 16:07:29 +08:00 |
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44fb098aff
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Merge branch 'DCE' into backend
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2025-06-25 16:04:42 +08:00 |
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6f897d797a
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[backend] debugging array
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2025-06-25 16:02:41 +08:00 |
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0d23475aa1
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[死代码删除]:保证扩展性、模块化构建死代码删除，包括消除无用store,alloca,load,globalval,mem2reg引入的无用alloca以及reg2mem导致的store-load-store冗余存储
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2025-06-25 15:33:25 +08:00 |
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b12732f10d
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修复分析器逻辑，保证优化遍共享一个分析器（主要是在mem2reg）
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2025-06-25 15:30:28 +08:00 |
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15a80bd5cd
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[backend] fix the logical error of constants in interference graph construction
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2025-06-25 14:37:46 +08:00 |
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c8587a6d0b
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[backend] introduced riscv64
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2025-06-25 14:37:46 +08:00 |
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4c9c25aadc
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修复break，continue的IR生成
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2025-06-25 14:15:54 +08:00 |
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1e06c5a446
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debugging
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2025-06-25 14:00:27 +08:00 |
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050113d31d
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增加Reg2Mem,但是会生成死存储指令，需要死代码删除支持识别死存储指令
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2025-06-25 13:17:16 +08:00 |
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3dc7c274cf
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修复支配树生成算法
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2025-06-25 12:42:28 +08:00 |
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e6c4e91956
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fix % repeat
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2025-06-25 12:27:02 +08:00 |
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4fabcc9952
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mem2reg流程基本跑通，修复phi函数打印，需要删除调试print
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2025-06-25 12:23:59 +08:00 |
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9bb300ece5
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Created a shell script for testing
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2025-06-25 06:27:31 +08:00 |
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c04f508171
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[backend] implemented call function parameter passing using registers
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2025-06-25 06:27:05 +08:00 |
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24913641f2
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[backend] fix bugs of not
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2025-06-25 02:24:45 +08:00 |
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bd0b624e87
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debugging
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2025-06-25 02:22:16 +08:00 |
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af1ad795ff
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[backend] fix bugs of unary ops
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2025-06-25 01:07:13 +08:00 |
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ac7644f450
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添加数据流分析类，实现前向后向分析的模板动作，实现活跃变量分析，基本借鉴学长代码，后续可优化实现
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2025-06-24 23:45:43 +08:00 |
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eadeadfbad
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[backend] introduced float instrs and regs
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2025-06-24 23:24:09 +08:00 |
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430224cfef
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Merge commit 'd50f76a77024d830c3dd7311ed910d689c9d5f16' into backend
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2025-06-24 22:52:01 +08:00 |
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3dbb394bc2
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初步构建分析器，增加控制流分析，实现支配节点计算，支配树构建，支配边界计算，为后续Mem2reg做准备
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2025-06-24 22:39:20 +08:00 |
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d50f76a770
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修复IR函数参数输出，变量命名
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2025-06-24 16:39:42 +08:00 |
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5222027b68
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[backend] almost all test passed
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2025-06-24 16:03:39 +08:00 |
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cd91cc98ed
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Created some shell scripts for testing
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2025-06-24 15:13:02 +08:00 |
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f72b9ccc00
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[backend] fixed bugs of testcase1
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2025-06-24 15:12:07 +08:00 |
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