Commit Graph

68 Commits

Author SHA1 Message Date
88a561177d [backend] incorrect asm output 2025-06-22 20:00:03 +08:00
4711fb603b fixed bugs brought out by merging 2025-06-22 14:39:38 +08:00
dda8bbe444 Merge branch 'array_add' 2025-06-22 14:24:00 +08:00
d90330af3f add Utils::initExternalFunction 2025-06-22 14:14:02 +08:00
25a8c72a9b [backend] it works 1.0 2025-06-22 14:06:14 +08:00
4828c18f96 前端基本构建完毕,build前端部分无报错,argument类删除后端报错,llvmIR输出待完成 2025-06-22 00:25:43 +08:00
73b382773a 暂存旧符号表结构定义,TODO.md中添加相关说明 2025-06-21 18:07:32 +08:00
0a04c816cf 更新IR,.g4修改 2025-06-21 18:06:29 +08:00
232ed6d023 [backend] introduced rv32 backend 2025-06-21 17:26:50 +08:00
3ed1c7fecd 更改前置声明,IR生成更新 2025-06-21 16:39:13 +08:00
ba5f2a0620 删除格式化功能 2025-06-21 15:40:00 +08:00
8109d44232 工具类方法部分实现,实现部分IR生成 2025-06-21 14:33:56 +08:00
2b038e671b 修复bug 2025-06-21 14:33:22 +08:00
c1583e447d 更改g4文件,优化IR生成流程 2025-06-21 13:44:51 +08:00
30f89bba23 更新IR结构,重写IRBuilder 2025-06-21 12:53:41 +08:00
c54543bff3 更新目录结构,修改IR结构,部分修复IR生成 2025-06-20 22:46:04 +08:00
1de8c0e7d7 引入了常量池优化,修改constvalue类并对IR生成修复,能够编译通过 2025-06-19 00:18:58 +08:00
1aa785efc3 add arraytype def 2025-06-16 20:56:32 +08:00
5727d3bde5 [IR Gen] debugging SIGSEGV 2025-06-09 21:11:17 +08:00
3c5fb7d17b [IR Gen] fixed build errors 2025-06-09 20:06:05 +08:00
7d08763b2e [IR gen] debugging 2025-06-09 19:30:37 +08:00
c47d522e3a [IR Gen] debugging expreimental IR generator 2025-06-09 19:29:59 +08:00
5e84961dcf [IR gen] introduced IR builder into LLVMIRGenerator 2025-06-09 00:47:47 +08:00
df209f976e fixed bugs brought out by merging 2025-05-30 02:13:17 +08:00
969c83125d Merge branch 'lab2-IRGen' 2025-05-30 02:06:43 +08:00
fbb2f5f310 replace "i++;" with "i = i + 1;" in testcase 20 2025-05-30 01:57:24 +08:00
77f79dcbaf merging, fixed some bugs 2025-05-30 01:34:47 +08:00
551d727733 merging 2025-05-29 22:09:16 +08:00
1c799bd04f merging 2025-05-29 19:25:46 +08:00
09d67fdaf1 merging branch lab2-IRGen into master 2025-05-29 17:14:42 +08:00
1e47af2771 merging branch lab2-IRGen into master 2025-05-29 16:09:17 +08:00
bb73ce3b5a merging branch lab2-IRGen into master 2025-05-28 23:49:02 +08:00
f286845463 [lab3]addl movl ret passes clang test 2025-05-27 12:03:26 +08:00
29aea7781f [lab3] add print support for functions, blocks and instructions 2025-05-27 11:43:14 +08:00
dc7202849c [lab3] add middle-end and backend with bugs to fix 2025-05-26 23:17:31 +08:00
338e5ef9a4 Introduce middle-end 2025-05-24 16:27:48 +08:00
ec8deeeebf [lab2][night release]temporary stable version 0.1 2025-04-02 18:40:01 +08:00
9f562aa0be [lab2]implemented while, break, continue 2025-04-01 17:50:17 +08:00
9d619b11d7 [lab2]checkopint with "while, continue, break" not implemented 2025-03-31 20:46:04 +08:00
dfa396b06f [lab2]now 01_add.ll generated by sysy can be compiled to executable by clang 2025-03-31 03:54:39 +08:00
90ba6db318 [lab2]IR-Gen implementation using given code by xxy
Merge pull request !4 from Downright/master
2025-03-26 11:42:19 +00:00
a35c63245e Remove .vscode dir 2025-03-26 18:34:36 +08:00
f01c38d3e8 commit 4 cmakelist and .gitignore 2025-03-26 18:29:17 +08:00
f74d319399 pass test 11_add2 2025-03-26 11:44:34 +08:00
1322ed8e08 gdb json 2025-03-26 11:39:29 +08:00
9bea0879e0 pass test1,but test2 segmentation fault 2025-03-26 11:39:22 +08:00
8a743a0036 [lab2]add a TODO table 2025-03-24 21:18:40 +08:00
93607333ad [lab2]fixed a lot of bugs 2025-03-24 19:26:42 +08:00
7f364abffb frame finished but bad_any_cast 2025-03-24 19:06:49 +08:00
a36f73c8a2 add file 2025-03-24 00:44:52 +08:00