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Bump rocketchip to latest, chisel to 3.5.2

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Remove fork of BusTopologies from rocket-chip

Update generators/chipyard/src/main/scala/config/AbstractConfig.scala

Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
This commit is contained in:
Jerry Zhao
2022-09-01 18:06:21 -07:00
parent bd5ca643b8
commit 04e80a6984
16 changed files with 30 additions and 116 deletions
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2
build.sbt
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@@ -60,7 +60,7 @@ def isolateAllTests(tests: Seq[TestDefinition]) = tests map { test =>
new Group(test.name, Seq(test), SubProcess(options))
} toSeq
val chiselVersion = "3.5.1"
val chiselVersion = "3.5.2"
lazy val chiselSettings = Seq(
libraryDependencies ++= Seq("edu.berkeley.cs" %% "chisel3" % chiselVersion,