Add TutorialNoCConfig
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.gitignore
vendored
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.gitignore
vendored
@@ -21,3 +21,4 @@ env-riscv-tools.sh
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env-esp-tools.sh
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.bsp/
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.conda-env/
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.#*
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@@ -23,7 +23,7 @@ class TinyRocketConfig extends Config(
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// DOC include start: FFTRocketConfig
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class FFTRocketConfig extends Config(
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new fftgenerator.WithFFTGenerator(baseAddr=0x2000, numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at 0x2000 with 16bit fixed-point numbers.
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new fftgenerator.WithFFTGenerator(numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at 0x2000 with 16bit fixed-point numbers.
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig)
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// DOC include end: FFTRocketConfig
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@@ -1,6 +1,12 @@
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package chipyard
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import freechips.rocketchip.config.{Config}
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import constellation.channel._
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import constellation.routing._
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import constellation.topology._
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import constellation.noc._
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import constellation.soc.{GlobalNoCParams}
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import scala.collection.immutable.ListMap
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// This file is designed to accompany a live tutorial, with slides.
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// For each of 4 phases, participants will customize and build a
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@@ -68,3 +74,45 @@ class TutorialSha3BlackBoxConfig extends Config(
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new freechips.rocketchip.subsystem.WithNBigCores(1) ++
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new chipyard.config.AbstractConfig
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)
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// Tutorial Phase 5: Map a multicore heterogeneous SoC with multiple cores and memory-mapped accelerators
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class TutorialNoCConfig extends Config(
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// Try changing the dimensions of the Mesh topology
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new constellation.soc.WithGlobalNoC(constellation.soc.GlobalNoCParams(
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NoCParams(
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topology = TerminalRouter(Mesh2D(3, 4)),
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channelParamGen = (a, b) => UserChannelParams(Seq.fill(12) { UserVirtualChannelParams(4) }),
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routingRelation = NonblockingVirtualSubnetworksRouting(TerminalRouterRouting(
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Mesh2DEscapeRouting()), 10, 1)
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)
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)) ++
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// The inNodeMapping and outNodeMapping values are the physical identifiers of
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// routers on the topology to map the agents to. Try changing these to any
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// value within the range [0, topology.nNodes)
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new constellation.soc.WithPbusNoC(constellation.protocol.TLNoCParams(
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constellation.protocol.DiplomaticNetworkNodeMapping(
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inNodeMapping = ListMap("Core" -> 7),
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outNodeMapping = ListMap(
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"pbus" -> 8, "uart" -> 9, "control" -> 10, "gcd" -> 11,
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"writeQueue[0]" -> 0, "writeQueue[1]" -> 1, "tailChain[0]" -> 2))
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), true) ++
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new constellation.soc.WithSbusNoC(constellation.protocol.TLNoCParams(
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constellation.protocol.DiplomaticNetworkNodeMapping(
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inNodeMapping = ListMap(
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"Core 0" -> 0, "Core 1" -> 1,
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"serial-tl" -> 2),
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outNodeMapping = ListMap(
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"system[0]" -> 3, "system[1]" -> 4, "system[2]" -> 5, "system[3]" -> 6,
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"pbus" -> 7))
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), true) ++
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new chipyard.example.WithGCD ++
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new chipyard.harness.WithLoopbackNIC ++
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new icenet.WithIceNIC ++
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new fftgenerator.WithFFTGenerator(numPoints=8) ++
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new chipyard.example.WithStreamingFIR ++
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new chipyard.example.WithStreamingPassthrough ++
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new freechips.rocketchip.subsystem.WithNBanks(4) ++
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new freechips.rocketchip.subsystem.WithNBigCores(2) ++
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new chipyard.config.AbstractConfig
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)
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@@ -13,7 +13,7 @@ import freechips.rocketchip.util.UIntIsOneOf
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// DOC include start: GCD params
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case class GCDParams(
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address: BigInt = 0x2000,
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address: BigInt = 0x1000,
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width: Int = 32,
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useAXI4: Boolean = false,
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useBlackBox: Boolean = true)
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@@ -201,7 +201,7 @@ trait CanHavePeripheryGCDModuleImp extends LazyModuleImp {
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// DOC include start: GCD config fragment
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class WithGCD(useAXI4: Boolean, useBlackBox: Boolean) extends Config((site, here, up) => {
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class WithGCD(useAXI4: Boolean = false, useBlackBox: Boolean = false) extends Config((site, here, up) => {
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case GCDKey => Some(GCDParams(useAXI4 = useAXI4, useBlackBox = useBlackBox))
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})
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// DOC include end: GCD config fragment
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@@ -16,8 +16,8 @@ import freechips.rocketchip.subsystem._
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// Simple passthrough to use as testbed sanity check
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// StreamingPassthrough params
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case class StreamingPassthroughParams(
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writeAddress: BigInt = 0x2000,
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readAddress: BigInt = 0x2100,
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writeAddress: BigInt = 0x2200,
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readAddress: BigInt = 0x2300,
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depth: Int
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)
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Submodule generators/constellation updated: 2d25747867...b93fde3e28
Submodule generators/fft-generator updated: 4c335ff6ab...40357f00a8
@@ -6,7 +6,7 @@ LDFLAGS= -static
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include libgloss.mk
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PROGRAMS = pwm blkdev accum charcount nic-loopback big-blkdev pingd \
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streaming-passthrough streaming-fir nvdla spiflashread spiflashwrite fft
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streaming-passthrough streaming-fir nvdla spiflashread spiflashwrite fft gcd
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spiflash.img: spiflash.py
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python3 $<
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@@ -4,8 +4,8 @@
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#include <inttypes.h>
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#include <math.h>
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#define FFT_WRITE_LANE 0x2000
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#define FFT_RD_LANE_BASE 0x2008
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#define FFT_WRITE_LANE 0x2400
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#define FFT_RD_LANE_BASE 0x2408
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// addr of read lane i is FFT_RD_LANE_BASE + i * 8
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// from generators/fft-generator/test_pts.py (in the fft-generator repo)
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@@ -68,4 +68,4 @@ int main(void) {
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printf("PASS: FFT Test Passed\n");
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return 0;
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}
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}
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@@ -1,9 +1,9 @@
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#include "mmio.h"
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#define GCD_STATUS 0x2000
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#define GCD_X 0x2004
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#define GCD_Y 0x2008
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#define GCD_GCD 0x200C
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#define GCD_STATUS 0x1000
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#define GCD_X 0x1004
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#define GCD_Y 0x1008
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#define GCD_GCD 0x100C
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unsigned int gcd_ref(unsigned int x, unsigned int y) {
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while (y != 0) {
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@@ -37,6 +37,7 @@ int main(void)
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printf("Hardware result %d does not match reference value %d\n", result, ref);
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return 1;
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}
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printf("Hardware result %d is correct for GCD\n", result);
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return 0;
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}
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// DOC include end: GCD test
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@@ -1,7 +1,7 @@
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#define PASSTHROUGH_WRITE 0x2000
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#define PASSTHROUGH_WRITE_COUNT 0x2008
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#define PASSTHROUGH_READ 0x2100
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#define PASSTHROUGH_READ_COUNT 0x2108
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#define PASSTHROUGH_WRITE 0x2200
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#define PASSTHROUGH_WRITE_COUNT 0x2208
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#define PASSTHROUGH_READ 0x2300
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#define PASSTHROUGH_READ_COUNT 0x2308
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#include "mmio.h"
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