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floorplan for openroad flow is different from commercial flow bc of srams

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Nayiri K
2023-03-10 23:18:20 -08:00
parent 39260ac02e
commit 0f326ae980
2 changed files with 56 additions and 18 deletions
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21
vlsi/example-sky130.yml
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@@ -43,27 +43,12 @@ vlsi.inputs.placement_constraints:
# Place SRAM memory instances
# data cache
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/dcache/data/data_arrays_0_0/data_arrays_0_0_ext/mem_0_0"
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/dcache/data/data_arrays_0/data_arrays_0_ext/mem_0_0"
type: hardmacro
x: 50
y: 50
orientation: r90
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/dcache/data/data_arrays_0_1/data_arrays_0_0_ext/mem_0_0"
type: hardmacro
x: 50
y: 450
orientation: r90
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/dcache/data/data_arrays_0_2/data_arrays_0_0_ext/mem_0_0"
type: hardmacro
x: 50
y: 850
orientation: r90
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/dcache/data/data_arrays_0_3/data_arrays_0_0_ext/mem_0_0"
type: hardmacro
x: 50
y: 1250
orientation: r90
# tag array
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/frontend/icache/tag_array_0/tag_array_0_ext/mem_0_0"
type: hardmacro
@@ -72,7 +57,7 @@ vlsi.inputs.placement_constraints:
orientation: r90
# instruction cache
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/frontend/icache/data_arrays_0_0/data_arrays_0_0_0_ext/mem_0_0"
- path: "ChipTop/system/tile_prci_domain/tile_reset_domain_tile/frontend/icache/data_arrays_0_0/data_arrays_0_0_ext/mem_0_0"
type: hardmacro
x: 50
y: 2100