Merge pull request #291 from ucb-bar/alon-docs-dev

Pre-Release Adjustments

CHANGELOG.md

@@ -0,0 +1,3 @@
+[1.0.0] - 2019-10-11
+Added
+This repository used to be "project-template", a template for Chisel-based projects. Through tighter integration of multiple projects from the Berkeley Architecture Research group at UC Berkeley, this repository is re-released as Chipyard - a framework for agile hardware development of RISC-V based Systems-on-Chip.

CONTRIBUTING.md

@@ -0,0 +1,8 @@
+Contributing to Chipyard
+=============================
+
+### Branch management:
+
+1) github:com/ucb-bar/chipyard: master = stable release. All merges to master must go through PR.
+2) github:com/ucb-bar/chipyard: dev = pre-release non-stable branch with latest features. All merges to dev must go through PR.
+3) Other dependencies pointed at by Chipyard (e.g. firesim, boom): master should be the version submoduled in ucb-bar/chipyard master.

LICENSE

@@ -1,4 +1,4 @@
-Copyright (c) 2017, The Regents of the University of California (Regents).
+Copyright (c) 2017-2019, The Regents of the University of California (Regents).
 All Rights Reserved.
 
 Redistribution and use in source and binary forms, with or without

README.md

@@ -4,19 +4,31 @@
 
 ## Using Chipyard
 
-To get started using Chipyard, see the documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/en/latest/
+To get started using Chipyard, see the documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/
 
 ## What is Chipyard
 
-Chipyard is an open source starter template for your custom Chisel project.
+Chipyard is an open source framework for agile development of Chisel-based systems-on-chip.
 It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other [Berkeley][berkeley] projects to produce a [RISC-V][riscv] SoC with everything from MMIO-mapped peripherals to custom accelerators.
-It contains processor cores ([Rocket][rocket-chip], [BOOM][boom]), accelerators ([Hwacha][hwacha]), FPGA simulation tools ([FireSim][firesim]), ASIC tools ([HAMMER][hammer]) and other tooling to help create a full featured SoC.
+Chipyard contains processor cores ([Rocket][rocket-chip], [BOOM][boom]), accelerators ([Hwacha][hwacha]), memory systems, and additional peripherals and tooling to help create a full featured SoC.
+Chipyard supports multiple concurrent flows of agile hardware development, including software RTL simulation, FPGA-accelerated simulation ([FireSim][firesim]), automated VLSI flows ([Hammer][hammer]), and software workload generation for bare-metal and Linux-based systems ([FireMarshal][firemarshal]).
 Chipyard is actively developed in the [Berkeley Architecture Research Group][ucb-bar] in the [Electrical Engineering and Computer Sciences Department][eecs] at the [University of California, Berkeley][berkeley].
 
 ## Resources
 
-* Chipyard Website: ...TBD at a later date...
 * Chipyard Documentation: https://chipyard.readthedocs.io/
+* Chipyard Basics slides: https://fires.im/micro19-slides-pdf/02_chipyard_basics.pdf 
+* Chipyard Tutorial Exercise slides: https://fires.im/micro19-slides-pdf/03_building_custom_socs.pdf
+
+## Need help?
+
+* Join the Chipyard Mailing List: https://groups.google.com/forum/#!forum/chipyard
+* If you find a bug, post an issue on this repo
+
+## Contributing
+
+* See [CONTRIBUTING.md](/CONTRIBUTING.md)
+
 
 [hwacha]:http://hwacha.org
 [hammer]:https://github.com/ucb-bar/hammer
@@ -27,3 +39,4 @@ Chipyard is actively developed in the [Berkeley Architecture Research Group][ucb
 [riscv]: https://riscv.org/
 [rocket-chip]: https://github.com/freechipsproject/rocket-chip
 [boom]: https://github.com/ucb-bar/riscv-boom
+[firemarshal]: https://github.com/firesim/FireMarshal/