wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Merge pull request #340 from hngenc/patch-1

Browse Source 
Fix syntax error in vlsi/Makefile
This commit is contained in:
Abraham Gonzalez
2019-11-20 19:46:37 -08:00
committed by GitHub
parent 9a2b19122f a5988c3963
commit 2cb03e2f7b
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
vlsi/Makefile
View File

@@ -33,7 +33,7 @@ INPUT_CONFS ?= example.yml
HAMMER_EXEC ?= ./example-vlsi
VLSI_TOP ?= $(TOP)
VLSI_OBJ_DIR ?= $(vlsi_dir)/build
ifneq($(CUSTOM_VLOG), )
ifneq ($(CUSTOM_VLOG), )
OBJ_DIR ?= $(VLSI_OBJ_DIR)/custom-$(VLSI_TOP)
else
OBJ_DIR ?= $(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP)