ADD: add SPI documentation

docs/Generators/SiFive-Generators.rst

@@ -161,4 +161,54 @@ Including I2C in the SoC
       new chipyard.config.WithI2C(address = 0x10040000) ++
 
       // ...
-    )
+    )
+
+
+Serial Peripheral Interface (SPI) Device
+-------------------------------------------------
+
+SPI device is a periphery device provided by ``sifive-blocks``. The SPI interface can be used to communicate with external devices using the SPI protocol. 
+
+The serial peripheral interface (SPI) protocol supports half-duplex, full-duplex and simplex synchronous, serial communication with external devices. The interface can be configured as master and in this case it provides the communication clock (SCLK) to the external slave device. 
+
+
+SPI main features
+~~~~~~~~~~~~~~~~~~~~~~~
+
+* Master operation
+
+* Full-duplex synchronous transfers
+
+* 4 to 16-bit data size selection
+
+* Master mode baud rate prescalers up to fPCLK/2
+
+* NSS management by hardware or software
+
+* Programmable clock polarity and phase
+
+* Programmable data order with MSB-first or LSB-first shifting
+
+* Dedicated transmission and reception flags with interrupt capability
+
+* Two 32-bit embedded Rx and Tx FIFOs with DMA capability
+
+
+Including SPI in the SoC
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: scala
+
+    class ExampleChipConfig extends Config(
+      // ...
+
+      // ==================================
+      //   Set up Memory Devices
+      // ==================================
+      // ...
+      
+      // Peripheral section
+      new chipyard.config.WithSPI(address = 0x10031000) ++
+
+      // ...
+    )