Switch RTL-sim/FPGA/VLSI flows to chisel6

2024-04-23 11:48:33 -07:00
parent daf4b64f52
commit 39092e9b00
4 changed files with 45 additions and 23 deletions
--- a/sims/common-sim-flags.mk
+++ b/sims/common-sim-flags.mk
@@ -4,6 +4,7 @@
 SIM_OPT_CXXFLAGS := -O3
 LRISCV=-lriscv

+export USE_CHISEL6=1

 SIM_CXXFLAGS = \
 	$(CXXFLAGS) \