Move vcs flags to vcs.mk | Misc. cleanup

common.mk

@@ -14,7 +14,6 @@ endif
 #########################################################################################
 HELP_COMPILATION_VARIABLES += \
 "   EXTRA_GENERATOR_REQS   = requirements needed for the main generator" \
-"   EXTRA_SIM_CFLAGS       = CFLAGS for building simulators" \
 "   EXTRA_SIM_CXXFLAGS     = CXXFLAGS for building simulators" \
 "   EXTRA_SIM_LDFLAGS      = LDFLAGS for building simulators" \
 "   EXTRA_SIM_SOURCES      = simulation sources needed for simulator" \
@@ -22,7 +21,6 @@ HELP_COMPILATION_VARIABLES += \
 
 EXTRA_GENERATOR_REQS ?=
 EXTRA_SIM_CXXFLAGS   ?=
-EXTRA_SIM_CFLAGS     ?=
 EXTRA_SIM_LDFLAGS    ?=
 EXTRA_SIM_SOURCES    ?=
 EXTRA_SIM_REQS       ?=

sims/vcs/Makefile

@@ -41,81 +41,17 @@ include $(base_dir)/common.mk
 #########################################################################################
 VCS = vcs -full64
 
-PREPROC_DEFINES = \
-	+define+VCS \
-	+define+CLOCK_PERIOD=1.0 \
-	+define+PRINTF_COND=$(TB).printf_cond \
-	+define+STOP_COND=!$(TB).reset \
-	+define+RANDOMIZE_MEM_INIT \
-	+define+RANDOMIZE_REG_INIT \
-	+define+RANDOMIZE_GARBAGE_ASSIGN \
-	+define+RANDOMIZE_INVALID_ASSIGN
-
-VCS_NONCC_OPTS = \
-	-notice \
-	-line \
-	+lint=all,noVCDE,noONGS,noUI \
-	-timescale=1ns/1ps \
-	-quiet \
-	-q \
-	+rad \
-	+vcs+lic+wait \
-	+vc+list \
-	-error=noZMMCM \
-	-error=PCWM-L \
-	-sverilog +systemverilogext+.sv+.svi+.svh+.svt -assert svaext +libext+.sv \
-	+v2k +verilog2001ext+.v95+.vt+.vp +libext+.v \
-	+incdir+$(build_dir) \
-	$(PREPROC_DEFINES) \
-	-f $(sim_common_files) \
-	$(sim_vsrcs)
-
-#----------------------------------------------------------------------------------------
-# gcc configuration/optimization
-#----------------------------------------------------------------------------------------
-# -flto slows down compilation on small-memory and breaks on firesim-manager
-CMODE := -O3 -fbranch-probabilities -march=native
-
-VCS_CXXFLAGS = \
-	$(CXXFLAGS) \
-	$(CMODE) \
-	-I$(VCS_HOME)/include \
-	-I$(RISCV)/include \
-	-I$(dramsim_dir) \
-	-std=c++11 \
-	$(EXTRA_SIM_CXXFLAGS)
-
-VCS_LDFLAGS =	\
-	$(LDFLAGS) \
-	$(CMODE) \
-	-L$(RISCV)/lib \
-	-Wl,-rpath,$(RISCV)/lib \
-	-L$(sim_dir) \
-	-L$(dramsim_dir) \
-	-lfesvr \
-	-ldramsim \
-	$(EXTRA_SIM_LDFLAGS)
-
-VCS_CC_OPTS = \
-	-CFLAGS "$(VCS_CXXFLAGS)" \
-	-LDFLAGS "$(VCS_LDFLAGS)"
-
-#----------------------------------------------------------------------------------------
-# full vcs+gcc opts
-#----------------------------------------------------------------------------------------
-VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS)
+VCS_OPTS = $(VCS_CC_OPTS) $(VCS_NONCC_OPTS) $(PREPROC_DEFINES)
 
 #########################################################################################
 # vcs simulator rules
 #########################################################################################
 $(sim): $(sim_vsrcs) $(sim_common_files) $(dramsim_lib) $(EXTRA_SIM_REQS)
-	rm -rf csrc && $(VCS) $(VCS_OPTS) $(EXTRA_SIM_SOURCES) -o $@ \
-	-debug_pp
+	rm -rf csrc && $(VCS) $(VCS_OPTS) $(EXTRA_SIM_SOURCES) -o $@
 
 $(sim_debug): $(sim_vsrcs) $(sim_common_files) $(dramsim_lib) $(EXTRA_SIM_REQS)
 	rm -rf csrc && $(VCS) $(VCS_OPTS) $(EXTRA_SIM_SOURCES) -o $@ \
-	+define+DEBUG \
-	-debug_pp
+	+define+DEBUG
 
 #########################################################################################
 # create a vcs vpd rule

sims/verilator/Makefile

@@ -157,7 +157,6 @@ VERILATOR_CXXFLAGS = \
 VERILATOR_LDFLAGS =	\
 	$(LDFLAGS) \
 	$(RUNTIME_PROFILING_CFLAGS) \
-	$(CMODE) \
 	-L$(RISCV)/lib \
 	-Wl,-rpath,$(RISCV)/lib \
 	-L$(sim_dir) \

tools/dromajo/dromajo.mk

@@ -49,7 +49,6 @@ ifdef ENABLE_DROMAJO
 EXTRA_SIM_FLAGS += $(DROMAJO_FLAGS)
 
 # CC flags needed for all simulations
-EXTRA_SIM_CFLAGS += -I$(DROMAJO_DIR)
 EXTRA_SIM_CXXFLAGS += -I$(DROMAJO_DIR)
 
 # sourced needed for simulation

vcs.mk

@@ -17,9 +17,37 @@ VCS_CC_OPTS = \
 	-CC "-std=c++11" \
 	-CC "$(EXTRA_SIM_CC_FLAGS)"
 
+#----------------------------------------------------------------------------------------
+# gcc configuration/optimization
+#----------------------------------------------------------------------------------------
+# -flto slows down compilation on small-memory and breaks on firesim-manager
+CMODE := -O3 -fbranch-probabilities -march=native
+
+VCS_CXXFLAGS = \
+	$(CXXFLAGS) \
+	$(CMODE) \
+	-I$(RISCV)/include \
+	-I$(dramsim_dir) \
+	-std=c++11 \
+	$(EXTRA_SIM_CXXFLAGS)
+
+VCS_LDFLAGS =	\
+	$(LDFLAGS) \
+	-L$(RISCV)/lib \
+	-Wl,-rpath,$(RISCV)/lib \
+	-L$(sim_dir) \
+	-L$(dramsim_dir) \
+	-lfesvr \
+	-ldramsim \
+	$(EXTRA_SIM_LDFLAGS)
+
+VCS_CC_OPTS = \
+	-CFLAGS "$(VCS_CXXFLAGS)" \
+	-LDFLAGS "$(VCS_LDFLAGS)"
+
 VCS_NONCC_OPTS = \
-	$(dramsim_lib) \
-	$(RISCV)/lib/libfesvr.a \
+	-notice \
+	-line \
 	+lint=all,noVCDE,noONGS,noUI \
 	-error=PCWM-L \
 	-error=noZMMCM \
@@ -27,7 +55,6 @@ VCS_NONCC_OPTS = \
 	-quiet \
 	-q \
 	+rad \
-	+v2k \
 	+vcs+lic+wait \
 	+vc+list \
 	-f $(sim_common_files) \
@@ -35,10 +62,9 @@ VCS_NONCC_OPTS = \
 	+v2k +verilog2001ext+.v95+.vt+.vp +libext+.v \
 	-debug_pp \
 	+incdir+$(build_dir) \
-	$(sim_vsrcs) \
-	+libext+.v
+	$(sim_vsrcs)
 
-VCS_DEFINE_OPTS = \
+PREPROC_DEFINES = \
 	+define+VCS \
 	+define+CLOCK_PERIOD=$(CLOCK_PERIOD) \
 	+define+RESET_DELAY=$(RESET_DELAY) \

vlsi/Makefile

@@ -115,12 +115,16 @@ $(SIM_CONF): $(VLSI_RTL) $(HARNESS_FILE) $(HARNESS_SMEMS_FILE) $(sim_common_file
 	done
 	echo "  options_meta: 'append'" >> $@
 	echo "  defines:" >> $@
-	for x in $(subst +define+,,$(VCS_DEFINE_OPTS)); do \
+	for x in $(subst +define+,,$(PREPROC_DEFINES)); do \
 		echo '    - "'$$x'"' >> $@; \
 	done
 	echo "  defines_meta: 'append'" >> $@
-	echo "  compiler_opts:" >> $@
-	for x in $(filter-out "",$(filter-out -CC,$(VCS_CC_OPTS))); do \
+	echo "  compiler_cc_opts:" >> $@
+	for x in $(filter-out "",$(VCS_CXXFLAGS)); do \
+		echo '    - "'$$x'"' >> $@; \
+	done
+	echo "  compiler_ld_opts:" >> $@
+	for x in $(filter-out "",$(VCS_LDFLAGS)); do \
 		echo '    - "'$$x'"' >> $@; \
 	done
 	echo "  compiler_opts_meta: 'append'" >> $@