- remove unused GA build-extra-tests/action.yml
- cleanup exports in CA
- remove exports from build-extra-tests CA
- put exports in build-extra-tests.sh
- based it on $GITHUB_WORKSPACE
- changed exports in run-tests CA to use $GITHUB_WORKSPACE
- in common.mk
- removed TODO comment lines where `$(sim)` had been removed
- removed commented out lines that used `$(sim)`
- removed unused debugging script1.sh
This commit is contained in:
chick
28
.github/actions/build-extra-tests/action.yml
vendored
28
.github/actions/build-extra-tests/action.yml
vendored
@@ -1,28 +0,0 @@
|
||||
name: build-extra-tests
|
||||
description: 'Builds extra test required for FireSim tests'
|
||||
|
||||
inputs:
|
||||
tools-version:
|
||||
description: Which toolchain to build
|
||||
required: false
|
||||
default: 'riscv-tools'
|
||||
cache-key:
|
||||
description: Use this for caching
|
||||
required: true
|
||||
runs:
|
||||
using: "composite"
|
||||
steps:
|
||||
- uses: actions/cache@v2
|
||||
id: build-extra-tools-cache
|
||||
with:
|
||||
path: extra-tests-install
|
||||
key: ${{ needs.make-keys.outputs.extra-tests-cache-key }}
|
||||
restore-keys: ${{ needs.make-keys.outputs.extra-tests-cache-key }}
|
||||
- name: Build extra tests if not cached
|
||||
run: |
|
||||
export RISCV="/__w/chipyard/chipyard/riscv-tools-install"
|
||||
export LD_LIBRARY_PATH="$RISCV/lib"
|
||||
export PATH="$RISCV/bin:$PATH"
|
||||
.github/scripts/build-extra-tests.sh
|
||||
shell: bash
|
||||
|
||||
2
.github/actions/run-tests/action.yml
vendored
2
.github/actions/run-tests/action.yml
vendored
@@ -15,7 +15,7 @@ runs:
|
||||
steps:
|
||||
- name: run rtl build script cache of chipyard root should have been loaded by prepare-rtl
|
||||
run: |
|
||||
export RISCV="/__w/chipyard/chipyard/riscv-tools-install"
|
||||
export RISCV="$GITHUB_WORKSPACE/riscv-tools-install"
|
||||
export LD_LIBRARY_PATH="$RISCV/lib"
|
||||
export PATH="$RISCV/bin:$PATH"
|
||||
./.github/scripts/${{ inputs.run-script }} ${{ inputs.project-key }}
|
||||
|
||||
4
.github/scripts/build-extra-tests.sh
vendored
4
.github/scripts/build-extra-tests.sh
vendored
@@ -3,6 +3,10 @@
|
||||
# turn echo on and error on earliest command
|
||||
set -ex
|
||||
|
||||
export RISCV="$GITHUB_WORKSPACE/riscv-tools-install"
|
||||
export LD_LIBRARY_PATH="$RISCV/lib"
|
||||
export PATH="$RISCV/bin:$PATH"
|
||||
|
||||
# get shared variables
|
||||
SCRIPT_DIR="$( cd "$( dirname "$0" )" && pwd )"
|
||||
source $SCRIPT_DIR/defaults.sh
|
||||
|
||||
6
.github/workflows/chipyard-run-tests.yml
vendored
6
.github/workflows/chipyard-run-tests.yml
vendored
@@ -140,11 +140,7 @@ jobs:
|
||||
key: ${{ needs.make-keys.outputs.extra-tests-cache-key }}
|
||||
restore-keys: ${{ needs.make-keys.outputs.extra-tests-cache-key }}
|
||||
- name: Build extra tests if not cached
|
||||
run: |
|
||||
export RISCV="/__w/chipyard/chipyard/riscv-tools-install"
|
||||
export LD_LIBRARY_PATH="$RISCV/lib"
|
||||
export PATH="$RISCV/bin:$PATH"
|
||||
.github/scripts/build-extra-tests.sh
|
||||
run: .github/scripts/build-extra-tests.sh
|
||||
|
||||
install-verilator:
|
||||
name: install-verilator
|
||||
|
||||
@@ -192,14 +192,10 @@ ifeq (,$(BINARY))
|
||||
endif
|
||||
|
||||
# run normal binary with hardware-logged insn dissassembly
|
||||
#TODO: maybe put this back, this is a test of minimum caching in CI
|
||||
#run-binary: $(output_dir) $(sim) check-binary
|
||||
run-binary: $(output_dir) check-binary
|
||||
(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $(BINARY) </dev/null 2> >(spike-dasm > $(sim_out_name).out) | tee $(sim_out_name).log)
|
||||
|
||||
# run simulator as fast as possible (no insn disassembly)
|
||||
#TODO: maybe put this back, this is a test of minimum caching in CI
|
||||
#run-binary-fast: $(output_dir) $(sim) check-binary
|
||||
run-binary-fast: $(output_dir) check-binary
|
||||
(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $(BINARY) </dev/null | tee $(sim_out_name).log)
|
||||
|
||||
@@ -216,21 +212,18 @@ $(binary_hex): $(output_dir) $(BINARY)
|
||||
$(base_dir)/scripts/smartelf2hex.sh $(BINARY) > $(binary_hex)
|
||||
|
||||
run-binary-hex: check-binary
|
||||
#TODO: Restore this or figure out a better caching run-binary-hex: $(output_dir) $(sim) $(binary_hex)
|
||||
run-binary-hex: $(output_dir) $(sim) $(binary_hex)
|
||||
run-binary-hex: run-binary
|
||||
run-binary-hex: override LOADMEM_ADDR = 80000000
|
||||
run-binary-hex: override LOADMEM = $(binary_hex)
|
||||
run-binary-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR)
|
||||
run-binary-debug-hex: check-binary
|
||||
#TODO: Restore this or figure out a better caching run-binary-debug-hex: $(output_dir) $(sim) $(binary_hex)
|
||||
run-binary-debug-hex: $(output_dir) $(sim) $(binary_hex)
|
||||
run-binary-debug-hex: run-binary-debug
|
||||
run-binary-debug-hex: override LOADMEM_ADDR = 80000000
|
||||
run-binary-debug-hex: override LOADMEM = $(binary_hex)
|
||||
run-binary-debug-hex: override SIM_FLAGS += +loadmem=$(LOADMEM) +loadmem_addr=$(LOADMEM_ADDR)
|
||||
run-binary-fast-hex: check-binary
|
||||
#TODO: put this back run-binary-fast-hex: $(output_dir) $(sim) $(binary_hex)
|
||||
run-binary-fast-hex: $(output_dir) $(binary_hex)
|
||||
run-binary-fast-hex: run-binary-fast
|
||||
run-binary-fast-hex: override LOADMEM_ADDR = 80000000
|
||||
@@ -246,11 +239,9 @@ $(output_dir):
|
||||
$(output_dir)/%: $(RISCV)/riscv64-unknown-elf/share/riscv-tests/isa/% $(output_dir)
|
||||
ln -sf $< $@
|
||||
|
||||
#$(output_dir)/%.run: $(output_dir)/% $(sim)
|
||||
$(output_dir)/%.run: $(output_dir)/%
|
||||
(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(PERMISSIVE_OFF) $< </dev/null | tee $<.log) && touch $@
|
||||
|
||||
#$(output_dir)/%.out: $(output_dir)/% $(sim)
|
||||
$(output_dir)/%.out: $(output_dir)/%
|
||||
(set -o pipefail && $(NUMA_PREFIX) $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(SEED_FLAG) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< </dev/null 2> >(spike-dasm > $@) | tee $<.log)
|
||||
|
||||
|
||||
51
script1.sh
51
script1.sh
@@ -1,51 +0,0 @@
|
||||
#!/bin/bash
|
||||
|
||||
cd /scratch/chick/chipyard && java \
|
||||
-Xmx8G \
|
||||
-Xss8M \
|
||||
-XX:MaxPermSize=256M \
|
||||
-Djava.io.tmpdir=/scratch/chick/chipyard/.java_tmp \
|
||||
-jar \
|
||||
/scratch/chick/chipyard/generators/rocket-chip/sbt-launch.jar \
|
||||
-Dsbt.sourcemode=true \
|
||||
-Dsbt.workspace=/scratch/chick/chipyard/tools \
|
||||
\
|
||||
";project \
|
||||
tapeout; \
|
||||
runMain \
|
||||
barstools.tapeout.transforms.GenerateTopAndHarness \
|
||||
--output-file \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.top.v \
|
||||
--harness-o \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.harness.v \
|
||||
--input-file \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.fir \
|
||||
--syn-top \
|
||||
ChipTop \
|
||||
--harness-top \
|
||||
TestHarness \
|
||||
--annotation-file \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.anno.json \
|
||||
--top-anno-out \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.top.anno.json \
|
||||
--top-dotf-out \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/firrtl_black_box_resource_files.top.f \
|
||||
--top-fir \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.top.fir \
|
||||
--harness-anno-out \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.harness.anno.json \
|
||||
--harness-dotf-out \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/firrtl_black_box_resource_files.harness.f \
|
||||
--harness-fir \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.harness.fir \
|
||||
--infer-rw \
|
||||
--repl-seq-mem \
|
||||
-c:TestHarness:-o:/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.top.mems.conf \
|
||||
-thconf \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig/chipyard.TestHarness.RocketConfig.harness.mems.conf \
|
||||
--target-dir \
|
||||
/scratch/chick/chipyard/sims/verilator/generated-src/chipyard.TestHarness.RocketConfig \
|
||||
--log-level \
|
||||
error \
|
||||
"
|
||||
|
||||
Reference in New Issue
Block a user