Rename cache/blocks submodules to match new chipsalliance ownership

This commit is contained in:
Jerry Zhao
2024-01-04 14:09:54 -08:00
parent d9bc036cb6
commit 7c13574769
15 changed files with 37 additions and 37 deletions

View File

@@ -5,7 +5,7 @@ index c3be6161..2a6d7160 100644
@@ -147,7 +147,7 @@ lazy val testchipip = (project in file("generators/testchipip"))
lazy val chipyard = (project in file("generators/chipyard"))
.dependsOn(testchipip, rocketchip, boom, hwacha, sifive_blocks, sifive_cache, iocell,
.dependsOn(testchipip, rocketchip, boom, hwacha, rocketchip_blocks, rocketchip_inclusive_cache, iocell,
- sha3, // On separate line to allow for cleaner tutorial-setup patches
+ //sha3, // On separate line to allow for cleaner tutorial-setup patches
dsptools, rocket_dsp_utils,