Merge pull request #1605 from ucb-bar/change-reset-vector

REFACTOR: change bootaddr register address and PC reset vector address

docs/Customization/Boot-Process.rst

@@ -12,7 +12,7 @@ Device Tree Binary (dtb) which details the components of the system.
 The assembly for the BootROM code is located in
 `generators/testchipip/src/main/resources/testchipip/bootrom/bootrom.S <https://github.com/ucb-bar/testchipip/blob/master/src/main/resources/testchipip/bootrom/bootrom.S>`_.
 The BootROM address space starts at ``0x10000`` (determined by the ``BootROMParams`` key in the configuration) and execution starts at address
-``0x10040`` (given by the linker script and reset vector in the ``BootROMParams``), which is marked by the ``_hang`` label in the BootROM assembly.
+``0x10000`` (given by the linker script and reset vector in the ``BootROMParams``), which is marked by the ``_hang`` label in the BootROM assembly.
 
 The Chisel generator encodes the assembled instructions into the BootROM
 hardware at elaboration time, so if you want to change the BootROM code, you

docs/Prototyping/Arty.rst

@@ -34,7 +34,7 @@ Probe an address on the target system:
 
 .. code-block:: shell
 
-		./uart_tsi +tty=/dev/ttyUSBX +init_read=0x10040 none
+		./uart_tsi +tty=/dev/ttyUSBX +init_read=0x10000 none
 
 Write some address before running a program:
 

docs/Prototyping/NexysVideo.rst

@@ -34,7 +34,7 @@ Probe an address on the target system:
 
 .. code-block:: shell
 
-		./uart_tsi +tty=/dev/ttyUSBX +init_read=0x10040 none
+		./uart_tsi +tty=/dev/ttyUSBX +init_read=0x10000 none
 
 Write some address before running a program:
 

generators/chipyard/src/main/scala/config/fragments/PeripheralFragments.scala

@@ -29,7 +29,7 @@ import chipyard.{ExtTLMem}
   * @param hang the power-on reset vector, i.e. the program counter will be set to this value on reset
   * @param contentFileName the path to the BootROM image
   */
-class WithBootROM(address: BigInt = 0x10000, size: Int = 0x10000, hang: BigInt = 0x10040) extends Config((site, here, up) => {
+class WithBootROM(address: BigInt = 0x10000, size: Int = 0x10000, hang: BigInt = 0x10000) extends Config((site, here, up) => {
   case BootROMLocated(x) => up(BootROMLocated(x), site)
       .map(_.copy(
         address = address,