Merge remote-tracking branch 'origin/main' into tetheredsim

This commit is contained in:
Jerry Zhao
2023-05-31 21:55:09 -07:00
52 changed files with 857 additions and 670 deletions

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@@ -33,7 +33,7 @@ grouping["group-peripherals"]="chipyard-dmirocket chipyard-dmiboom chipyard-spif
grouping["group-accels"]="chipyard-mempress chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-manymmioaccels"
grouping["group-constellation"]="chipyard-constellation"
grouping["group-tracegen"]="tracegen tracegen-boom"
grouping["group-other"]="icenet testchipip constellation"
grouping["group-other"]="icenet testchipip constellation rocketchip-amba rocketchip-tlsimple rocketchip-tlwidth rocketchip-tlxbar"
grouping["group-fpga"]="arty vcu118 vc707"
# key value store to get the build strings
@@ -70,6 +70,10 @@ mapping["firesim"]="SCALA_TEST=firesim.firesim.RocketNICF1Tests"
mapping["fireboom"]="SCALA_TEST=firesim.firesim.BoomF1Tests"
mapping["icenet"]="SUB_PROJECT=icenet"
mapping["testchipip"]="SUB_PROJECT=testchipip"
mapping["rocketchip-amba"]="SUB_PROJECT=rocketchip CONFIG=AMBAUnitTestConfig"
mapping["rocketchip-tlsimple"]="SUB_PROJECT=rocketchip CONFIG=TLSimpleUnitTestConfig"
mapping["rocketchip-tlwidth"]="SUB_PROJECT=rocketchip CONFIG=TLWidthUnitTestConfig"
mapping["rocketchip-tlxbar"]="SUB_PROJECT=rocketchip CONFIG=TLXbarUnitTestConfig"
mapping["arty"]="SUB_PROJECT=arty verilog"
mapping["vcu118"]="SUB_PROJECT=vcu118 verilog"

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@@ -139,6 +139,18 @@ case $1 in
constellation)
run_binary BINARY=none
;;
rocketchip-amba)
run_binary BINARY=none
;;
rocketchip-tlsimple)
run_binary BINARY=none
;;
rocketchip-tlwidth)
run_binary BINARY=none
;;
rocketchip-tlxbar)
run_binary BINARY=none
;;
*)
echo "No set of tests for $1. Did you spell it right?"
exit 1

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@@ -80,7 +80,7 @@ jobs:
eval "$(conda shell.bash hook)"
mkdir ${{ env.JAVA_TMP_DIR }}
export MAKEFLAGS="-j32"
./build-setup.sh -f
./build-setup.sh -f -v
run-cfg-finder:
name: run-cfg-finder
@@ -115,7 +115,7 @@ jobs:
cd vlsi
# NOTE: most conda installs are in separate conda envs because they mess up
# NOTE: most conda installs are in separate conda envs because they mess up
# each other's versions (for no apparent reason) and we need the latest versions
conda config --add channels defaults
conda config --add channels litex-hub
@@ -166,7 +166,7 @@ jobs:
name: cleanup
needs: [run-tutorial]
runs-on: ferry
if: ${{ always() && contains(join(needs.*.result, ','), 'success') }}
if: ${{ always() }}
steps:
- name: Delete repo copy and conda env
run: |

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@@ -880,6 +880,45 @@ jobs:
group-key: "group-other"
project-key: "testchipip"
rocketchip-run-tests:
name: rocketchip-run-tests
needs: prepare-chipyard-other
runs-on: self-hosted
steps:
- name: Delete old checkout
run: |
ls -alh .
rm -rf ${{ github.workspace }}/* || true
rm -rf ${{ github.workspace }}/.* || true
ls -alh .
- name: Checkout
uses: actions/checkout@v3
- name: Git workaround
uses: ./.github/actions/git-workaround
- name: Create conda env
uses: ./.github/actions/create-conda-env
- name: Run amba tests
uses: ./.github/actions/run-tests
with:
group-key: "group-other"
project-key: "rocketchip-amba"
# Below tests segfault with verilator, work fine in VCS
# - name: Run tlsimple tests
# uses: ./.github/actions/run-tests
# with:
# group-key: "group-other"
# project-key: "rocketchip-tlsimple"
# - name: Run tlwidth tests
# uses: ./.github/actions/run-tests
# with:
# group-key: "group-other"
# project-key: "rocketchip-tlwidth"
# - name: Run tlxbar tests
# uses: ./.github/actions/run-tests
# with:
# group-key: "group-other"
# project-key: "rocketchip-tlxbar"
constellation-run-tests:
name: constellation-run-tests
needs: prepare-chipyard-other
@@ -1004,6 +1043,7 @@ jobs:
tracegen-run-tests,
icenet-run-tests,
testchipip-run-tests,
rocketchip-run-tests,
constellation-run-tests,
prepare-chipyard-fpga, # firesim-run-tests,
fireboom-run-tests]