Merge pull request #525 from ucb-bar/unittests

Get icenet and testchipip unit tests working

.circleci/config.yml

@@ -252,6 +252,16 @@ jobs:
         steps:
             - prepare-rtl:
                 project-key: "chipyard-ariane"
+    prepare-icenet:
+        executor: main-env
+        steps:
+            - prepare-rtl:
+                project-key: "icenet"
+    prepare-testchipip:
+        executor: main-env
+        steps:
+            - prepare-rtl:
+                project-key: "testchipip"
     chipyard-rocket-run-tests:
         executor: main-env
         steps:
@@ -337,6 +347,18 @@ jobs:
             - run-tests:
                 project-key: "chipyard-ariane"
                 timeout: "30m"
+    icenet-run-tests:
+        executor: main-env
+        steps:
+            - run-tests:
+                project-key: "icenet"
+                timeout: "30m"
+    testchipip-run-tests:
+        executor: main-env
+        steps:
+            - run-tests:
+                project-key: "testchipip"
+                timeout: "30m"
 
 # Order and dependencies of jobs to run
 workflows:
@@ -431,6 +453,16 @@ workflows:
                     - install-riscv-toolchain
                     - install-verilator
 
+            - prepare-icenet:
+                requires:
+                    - install-riscv-toolchain
+                    - install-verilator
+
+            - prepare-testchipip:
+                requires:
+                    - install-riscv-toolchain
+                    - install-verilator
+
             # Run the respective tests
 
             # Run midasexamples test
@@ -495,3 +527,11 @@ workflows:
             - chipyard-ariane-run-tests:
                 requires:
                     - prepare-chipyard-ariane
+
+            - icenet-run-tests:
+                requires:
+                    - prepare-icenet
+
+            - testchipip-run-tests:
+                requires:
+                    - prepare-testchipip

.circleci/defaults.sh

@@ -57,3 +57,5 @@ mapping["tracegen-boom"]="SUB_PROJECT=chipyard CONFIG=BoomTraceGenConfig TOP=Tra
 mapping["firesim"]="SCALA_TEST=firesim.firesim.RocketNICF1Tests"
 mapping["firesim-multiclock"]="SCALA_TEST=firesim.firesim.RocketMulticlockF1Tests"
 mapping["fireboom"]="SCALA_TEST=firesim.firesim.BoomF1Tests"
+mapping["icenet"]="SUB_PROJECT=icenet"
+mapping["testchipip"]="SUB_PROJECT=testchipip"

.circleci/run-tests.sh

@@ -71,6 +71,12 @@ case $1 in
     chipyard-ariane)
         make run-binary-fast -C $LOCAL_SIM_DIR ${mapping[$1]} BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/benchmarks/dhrystone.riscv
         ;;
+    icenet)
+        make run-none-fast -C $LOCAL_SIM_DIR ${mapping[$1]}
+        ;;
+    testchipip)
+        make run-none-fast -C $LOCAL_SIM_DIR ${mapping[$1]}
+        ;;
     *)
         echo "No set of tests for $1. Did you spell it right?"
         exit 1

common.mk

@@ -136,6 +136,12 @@ run-binary-debug: $(sim_debug)
 
 run-fast: run-asm-tests-fast run-bmark-tests-fast
 
+run-none: $(output_dir)/none.out
+
+run-none-fast: $(output_dir)/none.run
+
+run-none-debug: $(output_dir)/none.vpd
+
 #########################################################################################
 # run assembly/benchmarks rules
 #########################################################################################
@@ -149,6 +155,14 @@ $(output_dir)/%.run: $(output_dir)/% $(sim)
 $(output_dir)/%.out: $(output_dir)/% $(sim)
 	(set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) $< </dev/null 2> >(spike-dasm > $@) | tee $<.log)
 
+$(output_dir)/none.run: $(sim)
+	mkdir -p $(output_dir)
+	(set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(PERMISSIVE_OFF) $< </dev/null | tee $<.log) && touch $@
+
+$(output_dir)/none.out: $(sim)
+	mkdir -p $(output_dir)
+	(set -o pipefail && $(sim) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) $(PERMISSIVE_OFF) none </dev/null 2> >(spike-dasm > $@) | tee $(output_dir)/none.log)
+
 #########################################################################################
 # include build/project specific makefrags made from the generator
 #########################################################################################

generators/chipyard/src/main/scala/unittest/TestHarness.scala

@@ -0,0 +1,9 @@
+package chipyard.unittest
+
+import chisel3._
+import freechips.rocketchip.config.Parameters
+
+class TestHarness(implicit val p: Parameters) extends Module {
+  val io = IO(new Bundle { val success = Output(Bool()) })
+  io.success := Module(new UnitTestSuite).io.finished
+}

generators/chipyard/src/main/scala/unittest/UnitTestSuite.scala

@@ -0,0 +1,8 @@
+package chipyard.unittest
+
+import freechips.rocketchip.config.Parameters
+import freechips.rocketchip.util.{ElaborationArtefacts, PlusArgArtefacts}
+
+class UnitTestSuite(implicit p: Parameters) extends freechips.rocketchip.unittest.UnitTestSuite {
+  ElaborationArtefacts.add("plusArgs", PlusArgArtefacts.serialize_cHeader)
+}

sims/vcs/Makefile

@@ -56,7 +56,7 @@ VCS_CC_OPTS = \
 VCS_NONCC_OPTS = \
 	+lint=all,noVCDE,noONGS,noUI \
 	-error=PCWM-L \
-	-timescale=1ns/10ps \
+	-timescale=1ns/1ps \
 	-quiet \
 	-q \
 	+rad \
@@ -102,6 +102,10 @@ $(sim_debug): $(sim_vsrcs) $(sim_common_files) $(dramsim_lib) $(EXTRA_SIM_REQS)
 $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
 	(set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) +vcdplusfile=$@ $(PERMISSIVE_OFF) $< </dev/null 2> >(spike-dasm > $<.out) | tee $<.log)
 
+$(output_dir)/none.vpd: $(sim_debug)
+	mkdir -p $(output_dir)
+	(set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) +vcdplusfile=$@ $(PERMISSIVE_OFF) none </dev/null 2> >(spike-dasm > $(output_dir)/none.out) | tee $(output_dir)/none.log)
+
 #########################################################################################
 # general cleanup rule
 #########################################################################################

sims/verilator/Makefile

@@ -145,6 +145,12 @@ $(output_dir)/%.vpd: $(output_dir)/% $(sim_debug)
 	vcd2vpd $@.vcd $@ > /dev/null &
 	(set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) -v$@.vcd $(PERMISSIVE_OFF) $< </dev/null 2> >(spike-dasm > $<.out) | tee $<.log)
 
+$(output_dir)/none.vpd: $(sim_debug)
+	mkdir -p $(output_dir)
+	rm -f $@.vcd && mkfifo $@.vcd
+	vcd2vpd $@.vcd $@ > /dev/null &
+	(set -o pipefail && $(sim_debug) $(PERMISSIVE_ON) $(SIM_FLAGS) $(EXTRA_SIM_FLAGS) $(VERBOSE_FLAGS) -v$@.vcd $(PERMISSIVE_OFF) none </dev/null 2> >(spike-dasm > $(output_dir)/none.out) | tee $(output_dir)/none.log)
+
 #########################################################################################
 # general cleanup rule
 #########################################################################################

variables.mk

@@ -50,6 +50,30 @@ ifeq ($(SUB_PROJECT),hwacha)
 	TB                ?= TestDriver
 	TOP               ?= ExampleRocketSystem
 endif
+# For TestChipIP developers
+ifeq ($(SUB_PROJECT),testchipip)
+	SBT_PROJECT       ?= chipyard
+	MODEL             ?= TestHarness
+	VLOG_MODEL        ?= TestHarness
+	MODEL_PACKAGE     ?= chipyard.unittest
+	CONFIG            ?= TestChipUnitTestConfig
+	CONFIG_PACKAGE    ?= testchipip
+	GENERATOR_PACKAGE ?= chipyard
+	TB                ?= TestDriver
+	TOP               ?= UnitTestSuite
+endif
+# For IceNet developers
+ifeq ($(SUB_PROJECT),icenet)
+	SBT_PROJECT       ?= chipyard
+	MODEL             ?= TestHarness
+	VLOG_MODEL        ?= TestHarness
+	MODEL_PACKAGE     ?= chipyard.unittest
+	CONFIG            ?= IceNetUnitTestConfig
+	CONFIG_PACKAGE    ?= icenet
+	GENERATOR_PACKAGE ?= chipyard
+	TB                ?= TestDriver
+	TOP               ?= UnitTestSuite
+endif
 
 #########################################################################################
 # path to rocket-chip and testchipip