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Update docs on bringup sims

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This commit is contained in:
Jerry Zhao
2023-09-20 11:44:43 -07:00
parent 57ee757016
commit 9ab5067e35
2 changed files with 13 additions and 19 deletions
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7
generators/chipyard/src/main/scala/config/ChipConfigs.scala
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@@ -89,12 +89,13 @@ class ChipBringupHostConfig extends Config(
// Base is the no-cores config
new chipyard.NoCoresConfig)
// DOC include start: TetheredChipLikeRocketConfig
class TetheredChipLikeRocketConfig extends Config(
new chipyard.harness.WithAbsoluteFreqHarnessClockInstantiator ++ // use absolute freqs for sims in the harness
new chipyard.harness.WithMultiChipSerialTL(0, 1) ++ // connect the serial-tl ports of the chips together
new chipyard.harness.WithMultiChip(0, new ChipLikeRocketConfig) ++
new chipyard.harness.WithMultiChip(1, new ChipBringupHostConfig))
new chipyard.harness.WithMultiChip(0, new ChipLikeRocketConfig) ++ // ChipTop0 is the design-to-be-taped-out
new chipyard.harness.WithMultiChip(1, new ChipBringupHostConfig)) // ChipTop1 is the bringup design
// DOC include end: TetheredChipLikeRocketConfig
// Verilator does not initialize some of the async-reset reset-synchronizer
// flops properly, so this config disables them.