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Fix firechip cbus freq

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This commit is contained in:
Jerry Zhao
2023-10-22 14:23:35 -07:00
parent 2ffd52e2db
commit a4be708771
1 changed files with 5 additions and 1 deletions
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6
generators/firechip/src/main/scala/TargetConfigs.scala
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@@ -121,6 +121,7 @@ class WithFireSimHighPerfClocking extends Config(
// This frequency selection matches FireSim's legacy selection and is required // This frequency selection matches FireSim's legacy selection and is required
// to support 200Gb NIC performance. You may select a smaller value. // to support 200Gb NIC performance. You may select a smaller value.
new chipyard.config.WithPeripheryBusFrequency(3200.0) ++ new chipyard.config.WithPeripheryBusFrequency(3200.0) ++
new chipyard.config.WithControlBusFrequency(3200.0) ++
new chipyard.config.WithSystemBusFrequency(3200.0) ++ new chipyard.config.WithSystemBusFrequency(3200.0) ++
new chipyard.config.WithFrontBusFrequency(3200.0) ++ new chipyard.config.WithFrontBusFrequency(3200.0) ++
// Optional: These three configs put the DRAM memory system in it's own clock domain. // Optional: These three configs put the DRAM memory system in it's own clock domain.
@@ -140,6 +141,7 @@ class WithFireSimConfigTweaks extends Config(
// to generate faithful DDR3 timing values. // to generate faithful DDR3 timing values.
new chipyard.config.WithSystemBusFrequency(1000.0) ++ new chipyard.config.WithSystemBusFrequency(1000.0) ++
new chipyard.config.WithPeripheryBusFrequency(1000.0) ++ new chipyard.config.WithPeripheryBusFrequency(1000.0) ++
new chipyard.config.WithControlBusFrequency(1000.0) ++
new chipyard.config.WithMemoryBusFrequency(1000.0) ++ new chipyard.config.WithMemoryBusFrequency(1000.0) ++
new WithFireSimDesignTweaks new WithFireSimDesignTweaks
) )
@@ -185,7 +187,8 @@ class WithFireSimTestChipConfigTweaks extends Config(
new chipyard.config.WithTileFrequency(1000.0) ++ // Realistic tile frequency for a test chip new chipyard.config.WithTileFrequency(1000.0) ++ // Realistic tile frequency for a test chip
new chipyard.config.WithSystemBusFrequency(500.0) ++ // Realistic system bus frequency new chipyard.config.WithSystemBusFrequency(500.0) ++ // Realistic system bus frequency
new chipyard.config.WithMemoryBusFrequency(1000.0) ++ // Needs to be 1000 MHz to model DDR performance accurately new chipyard.config.WithMemoryBusFrequency(1000.0) ++ // Needs to be 1000 MHz to model DDR performance accurately
new chipyard.config.WithPeripheryBusFrequency(500.0) ++ // Match the sbus and pbus frequency new chipyard.config.WithPeripheryBusFrequency(500.0) ++ // Match the sbus/pbus/cbus freqs
new chipyard.config.WithControlBusFrequency(500.0) ++
new chipyard.clocking.WithClockGroupsCombinedByName(("uncore", Seq("sbus", "pbus", "fbus", "cbus", "implicit"), Seq("tile"))) ++ new chipyard.clocking.WithClockGroupsCombinedByName(("uncore", Seq("sbus", "pbus", "fbus", "cbus", "implicit"), Seq("tile"))) ++
// Crossing specifications // Crossing specifications
new chipyard.config.WithCbusToPbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between PBUS and CBUS new chipyard.config.WithCbusToPbusCrossingType(AsynchronousCrossing()) ++ // Add Async crossing between PBUS and CBUS
@@ -247,6 +250,7 @@ class FireSimSmallSystemConfig extends Config(
new WithDefaultMemModel ++ new WithDefaultMemModel ++
new WithBootROM ++ new WithBootROM ++
new chipyard.config.WithPeripheryBusFrequency(3200.0) ++ new chipyard.config.WithPeripheryBusFrequency(3200.0) ++
new chipyard.config.WithControlBusFrequency(3200.0) ++
new WithoutClockGating ++ new WithoutClockGating ++
new WithoutTLMonitors ++ new WithoutTLMonitors ++
new freechips.rocketchip.subsystem.WithExtMemSize(1 << 28) ++ new freechips.rocketchip.subsystem.WithExtMemSize(1 << 28) ++