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rename missing vcs/verilator names | fix ci path

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abejgonzalez
2019-07-16 21:36:36 -07:00
parent 52f959f457
commit b7bc96b6d6
8 changed files with 14 additions and 45 deletions
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docs/Simulation/Software-RTL-Simulators.rst
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@@ -9,7 +9,7 @@ The Chipyard framework can download, build, and execute simulations using Verila
To run a simulation using Verilator, perform the following steps:
To compile the example design, run ``make`` in the ``sims/verisim`` directory.
To compile the example design, run ``make`` in the ``sims/verilator`` directory.
This will elaborate the ``DefaultRocketConfig`` in the example project.
An executable called ``simulator-example-DefaultRocketConfig`` will be produced.
@@ -47,7 +47,7 @@ To run a simulation using VCS, perform the following steps:
Make sure that the VCS simulator is on your ``PATH``.
To compile the example design, run make in the ``sims/vsim`` directory.
To compile the example design, run make in the ``sims/vcs`` directory.
This will elaborate the ``DefaultRocketConfig`` in the example project.
An executable called ``simulator-example-DefaultRocketConfig`` will be produced.