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rename missing vcs/verilator names | fix ci path

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abejgonzalez
2019-07-16 21:36:36 -07:00
parent 52f959f457
commit b7bc96b6d6
8 changed files with 14 additions and 45 deletions
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31
scripts/regression.sh
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@@ -1,31 +0,0 @@
#!/bin/bash
# NOTE: TEMPORARY UNTIL CI IS ONLINE
# Run by just giving the test to run (run-bmark-tests | run-asm-tests)
# Runs in vsim and verisim
set -ex
set -euo pipefail
cd sims/vsim/
make SUB_PROJECT=rocketchip CONFIG=DefaultConfig
make SUB_PROJECT=rocketchip CONFIG=DefaultConfig $1
make SUB_PROJECT=boom CONFIG=BoomConfig
make SUB_PROJECT=boom CONFIG=BoomConfig $1
make SUB_PROJECT=example CONFIG=DefaultRocketConfig
make SUB_PROJECT=example CONFIG=DefaultRocketConfig $1
make SUB_PROJECT=boomexample CONFIG=DefaultBoomConfig
make SUB_PROJECT=boomexample CONFIG=DefaultBoomConfig $1
cd ../verisim/
make SUB_PROJECT=rocketchip CONFIG=DefaultConfig
make SUB_PROJECT=rocketchip CONFIG=DefaultConfig $1
make SUB_PROJECT=boom CONFIG=BoomConfig
make SUB_PROJECT=boom CONFIG=BoomConfig $1
make SUB_PROJECT=example CONFIG=DefaultRocketConfig
make SUB_PROJECT=example CONFIG=DefaultRocketConfig $1
make SUB_PROJECT=boomexample CONFIG=DefaultBoomConfig
make SUB_PROJECT=boomexample CONFIG=DefaultBoomConfig $1