Rename implicit clock/reset to referenceclock/reset

fpga/src/main/scala/arty/TestHarness.scala

@@ -21,8 +21,8 @@ class ArtyFPGATestHarness(override implicit val p: Parameters) extends ArtyShell
 
   def success = {require(false, "Success not supported"); false.B }
 
-  def implicitClock = clock_32MHz
-  def implicitReset = hReset
+  def referenceClock = clock_32MHz
+  def referenceReset = hReset
 
   instantiateChipTops()
 }

fpga/src/main/scala/arty100t/Harness.scala

@@ -76,8 +76,8 @@ class Arty100THarness(override implicit val p: Parameters) extends Arty100TShell
 
     harnessSysPLL.plls.foreach(_._1.getReset.get := pllReset)
 
-    def implicitClock = dutClock.in.head._1.clock
-    def implicitReset = dutClock.in.head._1.reset
+    def referenceClock = dutClock.in.head._1.clock
+    def referenceReset = dutClock.in.head._1.reset
     def success = { require(false, "Unused"); false.B }
 
     ddrOverlay.mig.module.clock := harnessBinderClock

fpga/src/main/scala/vc707/TestHarness.scala

@@ -114,12 +114,12 @@ class VC707FPGATestHarnessImp(_outer: VC707FPGATestHarness) extends LazyRawModul
   val hReset = Wire(Reset())
   hReset := _outer.dutClock.in.head._1.reset
 
-  def implicitClock = _outer.dutClock.in.head._1.clock
-  def implicitReset = hReset
+  def referenceClock = _outer.dutClock.in.head._1.clock
+  def referenceReset = hReset
   def success = { require(false, "Unused"); false.B }
 
-  childClock := implicitClock
-  childReset := implicitReset
+  childClock := referenceClock
+  childReset := referenceReset
 
   instantiateChipTops()
 }

fpga/src/main/scala/vcu118/TestHarness.scala

@@ -118,12 +118,12 @@ class VCU118FPGATestHarnessImp(_outer: VCU118FPGATestHarness) extends LazyRawMod
   val hReset = Wire(Reset())
   hReset := _outer.dutClock.in.head._1.reset
 
-  def implicitClock = _outer.dutClock.in.head._1.clock
-  def implicitReset = hReset
+  def referenceClock = _outer.dutClock.in.head._1.clock
+  def referenceReset = hReset
   def success = { require(false, "Unused"); false.B }
 
-  childClock := implicitClock
-  childReset := implicitReset
+  childClock := referenceClock
+  childReset := referenceReset
 
   instantiateChipTops()
 }