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Merge pull request #1409 from ucb-bar/jerryz123-patch-5

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Fix chisel elab errors not causing flow to stop
This commit is contained in:
Jerry Zhao
2023-03-20 19:16:13 -07:00
committed by GitHub
parent 16e0f3e2ac b4452775c1
commit c62ff145eb
1 changed files with 2 additions and 2 deletions
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4
common.mk
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@@ -107,12 +107,12 @@ $(BOOTROM_TARGETS): $(build_dir)/bootrom.%.img: $(TESTCHIP_RSRCS_DIR)/testchipip
# AG: must re-elaborate if cva6 sources have changed... otherwise just run firrtl compile
$(FIRRTL_FILE) $(ANNO_FILE) $(CHISEL_LOG_FILE) &: $(SCALA_SOURCES) $(SCALA_BUILDTOOL_DEPS) $(EXTRA_GENERATOR_REQS)
mkdir -p $(build_dir)
$(call run_scala_main,$(SBT_PROJECT),$(GENERATOR_PACKAGE).Generator,\
(set -o pipefail && $(call run_scala_main,$(SBT_PROJECT),$(GENERATOR_PACKAGE).Generator,\
--target-dir $(build_dir) \
--name $(long_name) \
--top-module $(MODEL_PACKAGE).$(MODEL) \
--legacy-configs $(CONFIG_PACKAGE):$(CONFIG) \
$(EXTRA_CHISEL_OPTIONS)) | tee $(CHISEL_LOG_FILE)
$(EXTRA_CHISEL_OPTIONS)) | tee $(CHISEL_LOG_FILE))
define mfc_extra_anno_contents
[