some more hwacha info

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alonamid
2019-09-25 12:18:56 -07:00
parent 80328d0c4d
commit c6f5755900

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@@ -7,7 +7,9 @@ The Hwacha project includes the Hwacha microarchitecture generator, as well as t
For more information on the Hwacha project, please visit the `Hwacha website <http://hwacha.org/>`__.
To add the Hwacha vector unit to an SoC, you should add the ``hwacha.DefaultHwachaConfig`` config mixin to the SoC configurations.
To add the Hwacha vector unit to an SoC, you should add the ``hwacha.DefaultHwachaConfig`` config mixin to the SoC configurations. The Hwacha vector unit uses the RoCC port of a `Rocket Chip tile`, and by default connects to the memory system through the `System Bus` (i.e., directly to the L2 cache).
To change to configuration of the Hwacha vector unit, you can write a custom configuration to replace the ``DefaultHwachaConfig``. You can view the ``DefaultHwachaConfig`` under ``generators/hwacha/src/main/scala/configs.scala`` to see the possible configuration parameters.
Since Hwacha implements a non-standard RISC-V extension, it requires a unique software toolchain to be able to compile and asseble its vector instructions.
To install the Hwacha toolchain, run the ``./scripts/build-toolchains.sh esp-tools`` command within the root Chipyard directory. This may take a while, and it will install the ``esp-tools-install`` directory within your Chipyard root directory. ``esp-tools`` are a fork of ``riscv-tools`` (formelty a collection of relevant software RISC-V tools) that were enhanced with the additional non-standard vector instructions. However, due to the upstreaming of the equivalent RISC-V toolchains, esp-tools may not be up-to-date with the latest mainline version of the tools included in it.