fix docs
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@@ -1,7 +1,7 @@
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Configs, Parameters, Mix-ins, and Everything In Between
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========================================================
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A significant portion of generators in the ReBAR framework use the Rocket chip parameter system.
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A significant portion of generators in the ReBAR framework use the Rocket chip parameter system.
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This parameter system enables for the flexible configuration of the SoC without invasive RTL changes.
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In order to use the parameter system correctly, we will use several terms and conventions:
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@@ -13,15 +13,16 @@ It is important to note that a significant challenge with the Rocket parameter s
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**Config**
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A *Config* is a collection of multiple parameters being set to specific values.
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A `Config` is a collection of multiple parameters being set to specific values.
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Configs are additive, and can override each other.
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A Config can be composed of other configs.
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The naming convetion for an additive config is `With<YourConfig>`, while the naming convention for a non-additive config will be `<YourConfig>`.
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The naming convetion for an additive config is ``With<YourConfig>``, while the naming convention for a non-additive config will be ``<YourConfig>``.
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Configs can take arguments which will in-turn set parameters in the specific configs.
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Example config:
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..
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.. code-block:: scala
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class WithMyAcceleratorParams extends Config((site, here, up) => {
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case MyAcceleratorKey =>
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MyAcceleratorConfig(
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@@ -35,7 +36,8 @@ Example config:
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Example config which uses a higher level config:
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..
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.. code-block:: scala
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class WithMyMoreComplexAcceleratorConfig extends Config((site, here, up) => {
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case MyAcceleratorKey =>
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MyAcceleratorConfig(
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@@ -47,7 +49,8 @@ Example config which uses a higher level config:
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Example of additive configs:
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..
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.. code-block:: scala
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class SomeAdditiveConfig extends Config(
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new WithMyMoreComplexAcceleratorConfig ++
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new WithMyAcceleratorParams ++
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@@ -60,7 +63,8 @@ The cake pattern is a scala programming pattern, which enable "mixing" of multip
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Example of using the cake pattern to merge multiple system components into a single top-level design, extending a basic Rocket SoC:
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..
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.. code-block:: scala
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class MySoC(implicit p: Parameters) extends RocketSubsystem
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with CanHaveMisalignedMasterAXI4MemPort
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with HasPeripheryBootROM
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@@ -75,5 +79,5 @@ Example of using the cake pattern to merge multiple system components into a sin
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**Mix-in**
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A mix-in is a scala trait, which sets parameters for specific system components, as well as enabling instantiation and wiring of the relevant system components to system buses.
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The naming convetion for an additive mix-in is `Has<YourMixin>`.
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The naming convetion for an additive mix-in is ``Has<YourMixin>``.
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@@ -11,39 +11,50 @@ The ReBAR framework provides wrappers for two common software RTL simulators: th
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Verilator
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Verilator is an open-source RTL simulator. We run Verilator simulations from within the `sims/verisim` directory.
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In order to construct the simulator with our custom design, we run the following command within the `sims/verisim` directory:
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Verilator is an open-source RTL simulator. We run Verilator simulations from within the ``sims/verisim`` directory. Therefore, we will start by entering that directory:
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.. code-block:: shell
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cd sims/verisim
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In order to construct the simulator with our custom design, we run the following command within the ``sims/verisim`` directory:
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.. code-block:: shell
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..
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make TOP=<my_top_level_name> CONFIG=<my_config_name> SBT_PROJECT=<my_sbt_package_name> MODEL=<my_test_environment>
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Where `<my_top_level_name>` is the class name of the top level design, `<my
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The `make` command my have additional parameters (such as `CONFIG_PACKAGE` or `MODEL_PACKAGE`) depending on the complexity of the design and integration with multiple sub-project repositories in the sbt-based build system.
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Where ``<my_top_level_name>`` is the class name of the top level design, ``<my_config_name>`` is the name of the class we create for our parameters configuration, ``<my_sbt_package_name>`` is the name of the sbt package the include both our top-level class and our config class, and ``<my_test_environment>`` is the name of the class which defines the test harness for our system.
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The ``make`` command may have additional parameters (such as ``CONFIG_PACKAGE`` or ``MODEL_PACKAGE``) depending on the complexity of the design and integration with multiple sub-project repositories in the sbt-based build system.
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Common configurations are package using a `SUB_PROJECT` make variable. There, in order to simulate a simple Rocket-based example system we can use:
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Common configurations are package using a ``SUB_PROJECT`` make variable. There, in order to simulate a simple Rocket-based example system we can use:
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.. code-block:: shell
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..
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make SUB_PROJECT=example
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Alternatively, if we would like to simulate a simple BOOM-based example system we can use:
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..
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.. code-block:: shell
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make SUB_PROJECT=exampleboom
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Once the simulator has been constructed, we would like to run RISC-V programs on it. In the `sims/verisim` directory, we will find an executable file called `TODO`. We run this executable with out target RISC-V program as a command line argument. For example:
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..
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.. code-block:: shell
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TODO
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Alternatively, we can run a pre-packaged suite of RISC-V assembly tests, by adding the make target run-asm-tests. For example
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..
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.. code-block:: shell
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make run-asm-tests TOP=<my_top_level_name> CONFIG=<my_config_name> SBT_PROJECT=<my_sbt_package_name> MODEL=<my_test_environment>
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or
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..
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.. code-block:: shell
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make run-asm-tests SUB_PROJECT=example
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@@ -51,39 +62,51 @@ or
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VCS
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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VCS is a proprietry RTL simulator. This guide assumes that the VCS installation is found on our PATH. We run VCS simulations from within the `sims/vsim` directory.
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In order to construct the simulator with our custom design, we run the following command within the `sims/vsim` directory:
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VCS is a proprietry RTL simulator. This guide assumes that the VCS installation is found on our PATH. We run VCS simulations from within the ``sims/vsim`` directory. Therefore, we will start by entering the directory:
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.. code-block:: shell
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cd sims/vsim
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In order to construct the simulator with our custom design, we run the following command within the ``sims/vsim`` directory:
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.. code-block:: shell
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..
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make TOP=<my_top_level_name> CONFIG=<my_config_name> SBT_PROJECT=<my_sbt_package_name> MODEL=<my_test_environment>
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Where `<my_top_level_name>` is the class name of the top level design, `<my
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The `make` command my have additional parameters (such as `CONFIG_PACKAGE` or `MODEL_PACKAGE`) depending on the complexity of the design and integration with multiple sub-project repositories in the sbt-based build system.
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Where ``<my_top_level_name>`` is the class name of the top level design, ``<my_config_name>`` is the name of the class we create for our parameters configuration, ``<my_sbt_package_name>`` is the name of the sbt package the include both our top-level class and our config class, and ``<my_test_environment>`` is the name of the class which defines the test harness for our system.
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The ``make`` command my have additional parameters (such as ``CONFIG_PACKAGE`` or ``MODEL_PACKAGE``) depending on the complexity of the design and integration with multiple sub-project repositories in the sbt-based build system.
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Common configurations are package using a `SUB_PROJECT` make variable. There, in order to simulate a simple Rocket-based example system we can use:
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Common configurations are package using a ``SUB_PROJECT`` make variable. There, in order to simulate a simple Rocket-based example system we can use:
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.. code-block:: shell
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..
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make SUB_PROJECT=example
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Alternatively, if we would like to simulate a simple BOOM-based example system we can use:
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..
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.. code-block:: shell
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make SUB_PROJECT=exampleboom
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Once the simulator has been constructed, we would like to run RISC-V programs on it. In the `sims/vsim` directory, we will find an executable file called `TODO`. We run this executable with out target RISC-V program as a command line argument. For example:
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Once the simulator has been constructed, we would like to run RISC-V programs on it. In the ``sims/vsim`` directory, we will find an executable file called ``TODO``. We run this executable with out target RISC-V program as a command line argument. For example:
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.. code-block:: shell
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..
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TODO
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Alternatively, we can run a pre-packaged suite of RISC-V assembly tests, by adding the make target run-asm-tests. For example
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..
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.. code-block:: shell
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make run-asm-tests TOP=<my_top_level_name> CONFIG=<my_config_name> SBT_PROJECT=<my_sbt_package_name> MODEL=<my_test_environment>
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or
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..
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.. code-block:: shell
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make run-asm-tests SUB_PROJECT=example
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@@ -94,7 +117,7 @@ FireSim enables simulations at 1000x-100000x the speed of standard software simu
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To run an FPGA-accelerated simulation using FireSim, a we need to clone the ReBAR repository (or our fork of the ReBAR repository) to an AWS EC2, and follow the setup instructions specificied in the FireSim Initial Setup documentation page.
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After setting up the FireSim environment, we now need to generate a FireSim simulation around our selected digital design. We will work from within the `sims/firesim` directory.
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After setting up the FireSim environment, we now need to generate a FireSim simulation around our selected digital design. We will work from within the ``sims/firesim`` directory.
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TODO: Continue from here
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@@ -1,6 +1,6 @@
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.. _ReBAR Basics:
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.. _Getting Started:
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ReBAR Basics
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Getting Started
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================================
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These guides will walk you through the basics of the ReBAR framework:
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