Remove arty100t IOBinders file

fpga/src/main/scala/arty100t/IOBinders.scala

@@ -1,23 +0,0 @@
-package chipyard.fpga.arty100t
-
-import chisel3._
-import chisel3.experimental.{IO}
-
-import freechips.rocketchip.devices.debug.{HasPeripheryDebugModuleImp}
-
-import chipyard.iobinders.{ComposeIOBinder}
-
-// class WithDebugResetPassthrough extends ComposeIOBinder({
-//   (system: HasPeripheryDebugModuleImp) => {
-//     // Debug module reset
-//     val io_ndreset: Bool = IO(Output(Bool())).suggestName("ndreset")
-//     io_ndreset := system.debug.get.ndreset
-
-//     // JTAG reset
-//     val sjtag = system.debug.get.systemjtag.get
-//     val io_sjtag_reset: Bool = IO(Input(Bool())).suggestName("sjtag_reset")
-//     sjtag.reset := io_sjtag_reset
-
-//     (Seq(io_ndreset, io_sjtag_reset), Nil)
-//   }
-// })