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Author SHA1 Message Date
Abraham Gonzalez
5a41c5d9ac Use multi-clock config. frags to determine VCU118 clk freq 2021-04-01 16:21:44 -07:00
Abraham Gonzalez
f334d5799f Support 30MiB payloads - VCU118 FPGA 2021-04-01 16:21:16 -07:00
Abraham Gonzalez
4ab2228926 Bump CI image 2021-03-31 19:15:34 -07:00
Jerry Zhao
2849b3a001 Merge pull request #843 from ucb-bar/chip-features 
Features for test chips
 2021-03-31 19:09:53 -07:00
Abraham Gonzalez
ab57b7d2ed Enable add-apt-repo 2021-03-31 19:00:59 -07:00
Abraham Gonzalez
3b26d6a9f9 Bump requirements to get newer Git version (for CI) 2021-03-31 17:04:42 -07:00
Anoop
a7befc8c5c Updated barstools.rst after review-1 
Edits after review-1
 2021-03-31 22:19:49 +05:30
Jerry Zhao
709c6bb365 Bump testchipip 2021-03-31 09:19:29 -07:00
Anoop
bbaebcd596 Update barstools.rst 
Added info about adding our own sram-macros cache
 2021-03-31 17:28:24 +05:30
Jerry Zhao
c061ea0ac9 Bump testchipip | Add custom boot pin 2021-03-30 01:45:34 -07:00
dependabot[bot]
6eab7c813e Bump pygments from 2.2.0 to 2.7.4 in /docs 
Bumps [pygments](https://github.com/pygments/pygments) from 2.2.0 to 2.7.4.
- [Release notes](https://github.com/pygments/pygments/releases)
- [Changelog](https://github.com/pygments/pygments/blob/master/CHANGES)
- [Commits](https://github.com/pygments/pygments/compare/2.2.0...2.7.4)

Signed-off-by: dependabot[bot] <support@github.com>
 2021-03-29 19:36:06 +00:00
alonamid
b99d6bb7ac multiclock config multiple 2021-03-29 00:01:13 -07:00
Zitao Fang
ae304a8aa1 Add repo to run CI 2021-03-27 11:40:16 -07:00
alonamid
c93cd255ab sane firesim default target freqs 2021-03-25 23:28:07 -07:00
Jerry Zhao
ed2bfa8249 Don't pass JTAG oe signal off-chip (#832) 2021-03-24 01:08:46 -07:00
Abraham Gonzalez
fa275b69a3 Merge pull request #812 from ucb-bar/offchip-axi-setup 
AXI Memory Over TL Serial Link
 2021-03-23 11:05:12 -07:00
abejgonzalez
09ef82cabf Update harnessClk/Rst naming to buildtop | Small docs cleanup 2021-03-22 13:11:12 -07:00
abejgonzalez
5ffad327db Bump testchipip 2021-03-21 15:34:01 -07:00
abejgonzalez
55263971bc Use async queue to connect serdesser + other components 2021-03-19 20:49:49 -07:00
Abraham Gonzalez
262c5c8204 Merge pull request #828 from ucb-bar/async-serial 
Add option to add async queues between chip-serialIO and harness serdes
 2021-03-19 19:01:25 -07:00
abejgonzalez
f59a7901b0 Bump testchipip 2021-03-19 18:43:17 -07:00
abejgonzalez
d24bd119e6 Merge branch 'offchip-axi-setup' of github.com:ucb-bar/chipyard into offchip-axi-setup 2021-03-19 17:36:30 -07:00
abejgonzalez
87fa481cbb Fix TileResetCtrl so that tiles come out of reset after rest of uncore 2021-03-19 17:35:30 -07:00
abejgonzalez
b729a5f4a4 Allow run-asm/bmark debug make targets to specify random seed 2021-03-19 17:34:47 -07:00
abejgonzalez
1e42113926 Splitting up FireSim default frequencies into a separate config frag. 2021-03-19 17:33:39 -07:00
Abraham Gonzalez
0d6e971d17 Update docs/Advanced-Concepts/Chip-Communication.rst 
Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
 2021-03-18 20:02:15 -07:00
abejgonzalez
4a565088b5 Small spacing fixes 2021-03-18 20:01:45 -07:00
abejgonzalez
7b7bcf7996 Merge remote-tracking branch 'origin/dev' into offchip-axi-setup 2021-03-18 17:56:57 -07:00
abejgonzalez
5301723404 Use def instead of var Option for ref frequency 2021-03-16 19:42:24 -07:00
abejgonzalez
3439266b2e Small renaming in docs 2021-03-15 16:55:13 -07:00
abejgonzalez
6476c7e7f0 Small renaming/cleanup | Use LinkedHashMaps 2021-03-15 16:54:42 -07:00
Jerry Zhao
c5e7d8a9b2 Give HarnessRAM implicit clock/reset in SerialTiedOff 2021-03-15 15:35:41 -07:00
Jerry Zhao
a013f0d561 Fix SerialTL HarnessRAM BridgeBinder 2021-03-15 15:09:29 -07:00
Jerry Zhao
edd54e776c Bump testchipip 2021-03-15 14:05:33 -07:00
Jerry Zhao
8a78565c04 Update BridgeBinders with new HarnessRAM clocking 2021-03-15 12:45:40 -07:00
Jerry Zhao
c27c9d5d18 Add option to add async queues between chip-serialIO and harness serdes 2021-03-15 02:16:18 -07:00
Jerry Zhao
f52822ff7a Merge pull request #826 from ucb-bar/tile-reset-async 
Fix TileResetCtrl to be ahead of reset synchronizers.
 2021-03-12 16:51:58 -08:00
Jerry Zhao
2260fffc9c Bump testchipip 2021-03-12 09:33:50 -08:00
Jerry Zhao
c5cb8f1329 Bump testchipip for TileResetCtrl changes 2021-03-11 18:23:36 -08:00
Abraham Gonzalez
139149ef1f Merge pull request #802 from darius-bluespec/build-toolchains-arch 
Support specifying architecture when building tools.
 2021-03-11 12:01:28 -08:00
Abraham Gonzalez
30c9b63e7b More clarifications on harness clocks 2021-03-11 03:54:56 +00:00
Abraham Gonzalez
1ebc0f7a7e Allow the PLL to request the max freq 2021-03-11 03:30:14 +00:00
Abraham Gonzalez
e6b2a9c583 Merge pull request #821 from ucb-bar/pmp-fragment 
Add fragment to configure PMPs
 2021-03-10 19:13:47 -08:00
Jerry Zhao
1ff8572f25 Merge pull request #824 from KPrabs106/dev 
Fix IOCell generation for clock and reset to use IOCellKey
 2021-03-10 17:06:16 -08:00
Kartik Prabhu
7bcfaf1b7d Fix IOCell generation for clock and reset to use IOCellKey 2021-03-10 16:54:06 -08:00
Jerry Zhao
aac77b3d74 Move TileResetCtrl before the ResetSynchronizers, and give them an async reset 2021-03-10 14:46:53 -08:00
Abraham Gonzalez
d204ccd9fc Clean up the chip communication docs a bit more [ci skip] 2021-03-09 23:56:32 -08:00
Jerry Zhao
8f511aeaf3 Add fragment to configure PMPs 
Surprisingly there is no existing fragment to do this defined in rocketchip. Add our own here.
 2021-03-09 00:02:24 -08:00
Abraham Gonzalez
6e1b9429bd Fix docs harness binders reference 2021-03-08 21:32:13 -08:00
Abraham Gonzalez
ed6d10ac2b Merge remote-tracking branch 'origin/dev' into offchip-axi-setup 2021-03-08 21:20:26 -08:00