Jerry Zhao
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5d27ac5bbc
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[sim] Pipe /dev/null to simulators to fix VCS messing up stdout (#417)
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2020-01-30 10:08:53 -08:00 |
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Abraham Gonzalez
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3fe0460a80
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enforce that macrocompiler passes are done serially (#392)
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2020-01-23 18:06:28 -08:00 |
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Abraham Gonzalez
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335bbf7651
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Patch parallel make (#386)
* fix parallel make non-deterministic issue
* change touch to echo to not affect file state
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2020-01-22 09:08:05 -08:00 |
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Howard Mao
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bd6397130b
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make sure grep filter only omits .h files
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2019-10-31 20:18:09 -07:00 |
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Colin Schmidt
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b934c51315
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Add phony firrtl target to just build firrtl file (#317)
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2019-10-24 10:26:45 -07:00 |
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Howard Mao
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e859fb1779
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make sure blackbox resource files always created
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2019-10-21 09:55:40 -07:00 |
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Howard Mao
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05af2f9a9c
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Fix tracegen target and add to CI
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2019-10-21 09:55:40 -07:00 |
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abejgonzalez
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2c4783bfe9
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remove *.out file for fast sims
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2019-10-15 07:23:37 -07:00 |
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abejgonzalez
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8f2c5d4796
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add *.log files whenever a binary is run
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2019-10-14 20:55:40 -07:00 |
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abejgonzalez
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9199a02e1e
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add literal references | cleanup firrtl-transform-docs [ci skip]
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2019-09-25 13:21:01 -07:00 |
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Abraham Gonzalez
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98ded4d7c0
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Merge pull request #221 from ucb-bar/comment-sim-files
Comment sim_* make variables
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2019-09-02 19:36:19 -07:00 |
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Abraham Gonzalez
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95793babf4
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Merge pull request #219 from ucb-bar/enable-j-make
Make parallel support
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2019-09-02 16:19:50 -07:00 |
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Howard Mao
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f3026af8b1
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get rid of redundant regression test lists
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2019-09-02 09:22:10 -07:00 |
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abejgonzalez
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f34a6fc523
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reallow you to do -j for make | parallel ci runs
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2019-08-30 23:14:33 -07:00 |
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Howard Mao
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a2171bc7b8
|
find all scala source files instead of searching individual project directories
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2019-08-30 11:38:08 -07:00 |
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abejgonzalez
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c9c166f4a6
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comment on the sim_* variables
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2019-08-30 01:27:14 -07:00 |
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Howard Mao
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ed85e71c79
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fix the way header files are handled by makefiles
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2019-08-22 07:39:33 +08:00 |
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Colin Schmidt
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520de19f86
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Make waveforms precious (#204)
* Make waveforms precious
* Fix typo in run-binary-debug
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2019-08-16 11:06:10 -07:00 |
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Colin Schmidt
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5bf1dcbe42
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Fix tabs in common makefrag (#202)
|
2019-08-15 18:28:37 -07:00 |
|
Albert Magyar
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c487ca2f66
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Coordinate Top and Harness generation (#168)
* Coordinate Top and Harness generation
* Bump barstools
|
2019-07-31 09:36:52 -07:00 |
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Jerry Zhao
|
288ec15ba5
|
Fix run-binary-debug verbosity
|
2019-07-24 15:22:06 -07:00 |
|
Abraham Gonzalez
|
f97beed12d
|
Add phony targets
|
2019-07-17 15:31:03 -07:00 |
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abejgonzalez
|
b0b4078801
|
rename files | only remove .h on blackbox files
|
2019-07-16 18:55:44 -07:00 |
|
abejgonzalez
|
27641bdffc
|
Merge remote-tracking branch 'origin/dev' into filter-c-files
|
2019-07-16 16:56:58 -07:00 |
|
abejgonzalez
|
829687b254
|
move file name to variables.mk
|
2019-07-16 11:37:36 -07:00 |
|
abejgonzalez
|
85d904f108
|
add blkdev ci | cleanup simfiles to remove duplicates
|
2019-07-16 11:34:26 -07:00 |
|
abejgonzalez
|
01f21900fe
|
Merge remote-tracking branch 'origin/dev' into cleanup
|
2019-07-16 10:43:28 -07:00 |
|
Colin Schmidt
|
26a67fdbad
|
Add verbose to debug runs (#148)
* Add verbose to debug runs
* Reorg simulator flags for consistency, extensibility, and ease of use
|
2019-07-15 22:15:57 -07:00 |
|
abejgonzalez
|
fd5a00a0ab
|
rename sim dirs | add "fast" helper target | re-add -q flag
|
2019-07-15 16:51:17 -07:00 |
|
abejgonzalez
|
228cd36301
|
remove duplicate blackbox files | general grep
|
2019-07-10 13:35:19 -07:00 |
|
abejgonzalez
|
87e4090e38
|
bump boom | correct error on first cmd in pipe
|
2019-07-08 14:31:41 -07:00 |
|
Howard Mao
|
65df55cf9d
|
add InclusiveCache
|
2019-07-02 16:58:08 -07:00 |
|
David Biancolin
|
1bd9b08717
|
Merge branch 'rebar-dev' of https://github.com/ucb-bar/project-template into firesim-integration
|
2019-06-28 18:10:19 +00:00 |
|
abejgonzalez
|
b556bee0b9
|
rename to "Chipyard"
|
2019-06-23 22:47:23 -07:00 |
|
abejgonzalez
|
51960f4345
|
remove deprecated CHISEL_ARGS
|
2019-06-03 19:11:45 -07:00 |
|
David Biancolin
|
f4fb0c42b1
|
Fix a number of build.sbt related problems
|
2019-05-29 22:26:04 +00:00 |
|
David Biancolin
|
c0d4e848ba
|
WIP
|
2019-05-27 22:53:05 +00:00 |
|
Jerry Zhao
|
bc54b24b85
|
Merge pull request #84 from ucb-bar/rebar-rc-may
[WIP] Bump to May rocketchip | Support for large memory spaces
|
2019-05-22 11:04:01 -07:00 |
|
abejgonzalez
|
cc0d33ee4d
|
updated permissive naming | small bugfix for vcd/vpd dumping
|
2019-05-20 17:19:46 -07:00 |
|
abejgonzalez
|
30d54a6851
|
readme addition | pipe out output | renamed output files
|
2019-05-20 17:12:22 -07:00 |
|
abejgonzalez
|
65d6a900c3
|
rename output | helper rules to run binaries
|
2019-05-20 16:15:08 -07:00 |
|
Jerry Zhao
|
a7a4dd345b
|
Bump to May rocketchip | Support for BigInt mems
|
2019-05-17 18:21:20 -07:00 |
|
abejgonzalez
|
fa1c4ae221
|
reduce amount of sbt calls for sim
|
2019-05-16 22:57:18 -07:00 |
|
Jerry Zhao
|
340ed90652
|
Remove permissive flag for verisim
|
2019-05-11 19:59:49 -07:00 |
|
Jerry Zhao
|
db8b8f50cf
|
Move example/utilities to generator directory
|
2019-05-10 15:29:28 -07:00 |
|
Jerry Zhao
|
17bc3bf60d
|
Decouple SUB_PROJECT builds from example
|
2019-05-10 02:40:16 -07:00 |
|
Jerry Zhao
|
b88937b8a0
|
Fix vcs tests for rocketchip and hwacha
|
2019-04-24 18:23:26 -07:00 |
|
abejgonzalez
|
575980e337
|
track src changes correctly in make
|
2019-04-24 11:18:12 -07:00 |
|
abejgonzalez
|
4c3dc0889c
|
update make variable names | change hwacha to use its own generator
|
2019-04-24 00:43:44 -07:00 |
|
abejgonzalez
|
2bd70937cb
|
support verilator | rename build variable
|
2019-04-22 23:26:13 -07:00 |
|