Richard Yan
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7f23219b95
|
bump gemmini
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2024-01-24 17:01:14 -08:00 |
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Hansung Kim
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ccb679928a
|
Bump gemmini
|
2024-01-24 14:33:10 -08:00 |
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Hansung Kim
|
bfce045e5a
|
Bump gemmini to ext-spad
|
2024-01-23 22:25:59 -08:00 |
|
Hansung Kim
|
6d35905c2f
|
Bump radiance
|
2024-01-23 22:25:15 -08:00 |
|
Hansung Kim
|
886b5c5d8a
|
Add RadianceGemminiConfig and bump radiance
|
2024-01-23 16:27:11 -08:00 |
|
Hansung Kim
|
60daad826e
|
Hardcode 32bit into bootrom name
|
2024-01-23 16:26:35 -08:00 |
|
Hansung Kim
|
268a6fb80f
|
Clean up radiance configs
|
2024-01-23 14:14:08 -08:00 |
|
Hansung Kim
|
440ba484c3
|
Bump radiance
|
2024-01-23 14:13:53 -08:00 |
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Hansung Kim
|
bcf2b8ab0b
|
Bump radiance with uncoalescer fix
|
2024-01-18 19:26:07 -08:00 |
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Hansung Kim
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c9880c7086
|
Bump radiance with upstream merge
|
2024-01-16 23:55:55 -08:00 |
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Hansung Kim
|
4e2e04e523
|
Fix path to WithMbusScratchpad in radiance configs
|
2024-01-16 23:55:13 -08:00 |
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Hansung Kim
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bf84580010
|
Merge remote-tracking branch 'upstream/main' into graphics
|
2024-01-16 22:39:37 -08:00 |
|
Hansung Kim
|
ce570e0beb
|
Revert rocket-chip to pre-gpu changes
|
2024-01-16 22:32:18 -08:00 |
|
Hansung Kim
|
0a9291e1da
|
Add radiance submodule
|
2024-01-16 22:25:11 -08:00 |
|
Richard Yan
|
472a2ec178
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Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics
|
2024-01-16 21:11:12 -08:00 |
|
Richard Yan
|
6270d2f6e8
|
move radiance rom and soc configs out
|
2024-01-16 21:10:37 -08:00 |
|
Hansung Kim
|
57cce2d4fd
|
Bump rocket-gpu
|
2024-01-16 16:32:07 -08:00 |
|
Jerry Zhao
|
565c187549
|
Switch static assert to require
|
2024-01-16 10:15:53 -08:00 |
|
Ella Schwarz
|
47322af3c0
|
Add assert to check that chip id pin is wide enough
|
2024-01-14 14:47:12 -08:00 |
|
Ella Schwarz
|
67faf0c3e3
|
Use harness binder chipId to support multi-chip id pins
|
2024-01-12 11:39:54 -08:00 |
|
Ella Schwarz
|
e7ed33244a
|
fix naming
|
2024-01-12 10:36:54 -08:00 |
|
Ella Schwarz
|
fcf9139009
|
bump tcip
|
2024-01-12 10:36:50 -08:00 |
|
Ella Schwarz
|
7c55ff39cc
|
Add chipid port
|
2024-01-12 10:35:20 -08:00 |
|
Jerry Zhao
|
f84b2428d5
|
Fix CanHaveClockTap
|
2024-01-11 16:40:57 -08:00 |
|
Jerry Zhao
|
45d74f6db2
|
Merge remote-tracking branch 'origin/main' into symmetric_sertl
|
2024-01-11 11:43:24 -08:00 |
|
Jerry Zhao
|
8073ecb1e8
|
Merge pull request #1697 from ucb-bar/clock_tap
Add debug clock tap port to all default designs
|
2024-01-11 11:38:20 -08:00 |
|
Jerry Zhao
|
5bc9aea8da
|
Bump rc-inclusive-cache
|
2024-01-09 13:51:55 -08:00 |
|
Jerry Zhao
|
d51a9a74d3
|
Merge remote-tracking branch 'origin/main' into clusters
|
2024-01-09 13:30:26 -08:00 |
|
Jerry Zhao
|
7c13574769
|
Rename cache/blocks submodules to match new chipsalliance ownership
|
2024-01-05 10:42:00 -08:00 |
|
Tynan McAuley
|
0a42dd1ca1
|
Update deprecated APIs to prepare for Chisel 5
- `IO` was moved from `chisel3.experimental` to `chisel3`
- `DataMirror` was moved from `chisel3.experimental` to `chisel3.reflect`
|
2024-01-03 16:22:51 -08:00 |
|
Jerry Zhao
|
96ffc8f0a1
|
git push origin symmetric_sertl
Merge remote-tracking branch 'origin/main' into symmetric_sertl
|
2024-01-01 19:14:21 -08:00 |
|
Jerry Zhao
|
41651edbdc
|
Bump firesim | fix testchipip segfaults
|
2024-01-01 18:40:59 -08:00 |
|
-T.K.-
|
f3ab8bb7ca
|
Merge branch 'main' into clock_tap
|
2024-01-01 14:00:24 -08:00 |
|
Jerry Zhao
|
0069d17caf
|
Merge remote-tracking branch 'origin' into symmetric_sertl
|
2024-01-01 11:23:31 -08:00 |
|
-T.K.-
|
e8496c528f
|
Merge branch 'main' into add-default-scratch
|
2023-12-30 22:45:27 -08:00 |
|
Jerry Zhao
|
0fa09da5c1
|
Remove MBus spad from configs that do not support it
|
2023-12-30 07:03:34 -08:00 |
|
Tynan McAuley
|
c2175f4500
|
Reduce CDE lookups for IOBinders
|
2023-12-29 21:22:34 -08:00 |
|
-T.K.-
|
07a7f30b3b
|
ADD: set scratchpad as default config
|
2023-12-29 19:21:10 -08:00 |
|
-T.K.-
|
3eef3c36a6
|
Merge branch 'main' into clock_tap
|
2023-12-29 16:59:29 -08:00 |
|
Jerry Zhao
|
cce5122fd2
|
Bump testchipip to fix memory leak
|
2023-12-27 12:05:26 -08:00 |
|
Jerry Zhao
|
86f028ac78
|
Update SimTSI API in spiketile
|
2023-12-27 10:33:28 -08:00 |
|
Jerry Zhao
|
835562238a
|
Explicitly pass chipId to all HarnessBinders
|
2023-12-26 18:37:39 -08:00 |
|
Jerry Zhao
|
3885e79f77
|
Bump testchipip
|
2023-12-26 17:19:09 -08:00 |
|
Jerry Zhao
|
fdeede7b0b
|
Add tests for symmetric rocket chiplet config
|
2023-12-26 12:55:32 -08:00 |
|
Jerry Zhao
|
8e37dcdf81
|
Support multi-TSI/multi-SimDRAM
|
2023-12-26 12:52:23 -08:00 |
|
Jerry Zhao
|
81cc556c3b
|
Add symmetric rocket config
|
2023-12-26 10:05:44 -08:00 |
|
Jerry Zhao
|
194d4462f9
|
Update testchipip with source-synchronous serdes
|
2023-12-21 20:33:24 -08:00 |
|
Jerry Zhao
|
cfd555ee94
|
Bump testchipip for updated sertl type names
|
2023-12-21 14:18:06 -08:00 |
|
Jerry Zhao
|
b7176b3c29
|
Bump testchipip
|
2023-12-19 15:14:39 -08:00 |
|
Jerry Zhao
|
1e5ebf192a
|
Update firesim/firechip with new testchipip packaging
|
2023-12-19 12:11:12 -08:00 |
|