sgemm_impl: Add param to load accumulation tile in single_tile
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@@ -343,13 +343,61 @@ template <int accum_reg_set> inline void initialize_accum_regs() {
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}
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}
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// `C` is expected to be in N-major layout.
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__attribute__((always_inline)) inline void
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wmma_load_accum(const int thread_in_warp, const int warp_col,
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const int warp_row, const int wn_iter, const int wm_iter,
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const int dim_n, const float *C) {
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asm volatile("wmma_load_accum_start_%=:" ::);
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const int tid = thread_in_warp;
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// these are [0, TCM/TCN)
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int tid_row = 0;
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int tid_col = 0;
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map_c(tid, tid_row, tid_col);
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int local_row = (WM * warp_row + TCM * wm_iter) + tid_row;
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int local_col = (WN * warp_col + TCN * wn_iter) + tid_col;
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// @copypaste from wmma_store
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// @perf: this likely causes a lot of gmem bank conflicts
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if (wm_iter == 0) {
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const uint8_t *addr = reinterpret_cast<const uint8_t *>(
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&C[dim_n * (local_row + 0) + (local_col + 0)]);
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const uint8_t *addr_tworow = addr + (2 * dim_n) * sizeof(float);
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asm volatile("flw f16, %0(%1)" ::"i"(0 * sizeof(float)), "r"(addr));
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asm volatile("flw f17, %0(%1)" ::"i"(1 * sizeof(float)), "r"(addr));
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asm volatile("flw f18, %0(%1)" ::"i"(0 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f19, %0(%1)" ::"i"(1 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f20, %0(%1)" ::"i"(4 * sizeof(float)), "r"(addr));
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asm volatile("flw f21, %0(%1)" ::"i"(5 * sizeof(float)), "r"(addr));
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asm volatile("flw f22, %0(%1)" ::"i"(4 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f23, %0(%1)" ::"i"(5 * sizeof(float)), "r"(addr_tworow));
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} else {
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const uint8_t *addr = reinterpret_cast<const uint8_t *>(
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&C[dim_n * (local_row + 0) + (local_col + 0)]);
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const uint8_t *addr_tworow = addr + (2 * dim_n) * sizeof(float);
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asm volatile("flw f24, %0(%1)" ::"i"(0 * sizeof(float)), "r"(addr));
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asm volatile("flw f25, %0(%1)" ::"i"(1 * sizeof(float)), "r"(addr));
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asm volatile("flw f26, %0(%1)" ::"i"(0 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f27, %0(%1)" ::"i"(1 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f28, %0(%1)" ::"i"(4 * sizeof(float)), "r"(addr));
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asm volatile("flw f29, %0(%1)" ::"i"(5 * sizeof(float)), "r"(addr));
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asm volatile("flw f30, %0(%1)" ::"i"(4 * sizeof(float)), "r"(addr_tworow));
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asm volatile("flw f31, %0(%1)" ::"i"(5 * sizeof(float)), "r"(addr_tworow));
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}
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asm volatile("wmma_load_accum_finish_%=:" ::);
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}
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__attribute__((always_inline)) inline void
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wmma_store(const int thread_in_warp, const int warp_col, const int warp_row,
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const int wn_iter, const int wm_iter, const int dim_n,
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float *write_addr) {
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asm volatile ("wmma_store_start_%=:" :: );
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int tid = thread_in_warp;
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const int tid = thread_in_warp;
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// these are [0, TCM/TCN)
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int tid_row = 0;
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@@ -560,17 +608,19 @@ load_tile_to_smem(const uint32_t dim_major, const uint32_t mn_index,
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// Do a single tile*tile matrix multiplication using the matrix data stored in
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// SMEM. Useful in fused kernels where GEMMs are done at a per-tile scope.
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template <typename T,
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MemLayout layout_a, // memory layout of `local_a`
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MemLayout layout_b, // memory layout of `local_b`
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bool write_to_smem = false // if true, write result tile to SMEM at a
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// given address
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MemLayout layout_a, // memory layout of `local_a`
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MemLayout layout_b, // memory layout of `local_b`
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bool load_accum = false, // if true, load the accumulation registers
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// with `local_c`. used for the (C + A*B)
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// operation
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bool write_to_mem = false // if true, write the single result tile to
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// the memory at a given address
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>
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__attribute__((always_inline)) inline void
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thread_block_gemm_single_tile(const T *local_a, const T *local_b, T *local_c,
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const uint32_t tid_in_threadblock,
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const uint32_t threads_per_threadblock,
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const uint32_t threadblocks_per_cluster,
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const uint32_t threadblock_id_in_cluster) {
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__attribute__((always_inline)) inline void thread_block_gemm_single_tile(
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const T *local_a, const T *local_b, const T *local_c, T *result_addr,
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const uint32_t tid_in_threadblock, const uint32_t threads_per_threadblock,
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const uint32_t threadblocks_per_cluster,
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const uint32_t threadblock_id_in_cluster) {
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// no double-buffering
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// FIXME: duplicated from thread_block_gemm
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const uint32_t threads_per_warpgroup = threads_per_threadblock;
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@@ -581,6 +631,21 @@ thread_block_gemm_single_tile(const T *local_a, const T *local_b, T *local_c,
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const uint32_t warps_per_threadblock_per_core =
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NUM_WARPS / threadblocks_per_cluster;
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// TODO: it would be useful if this bit is split out into a function, so that
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// preloading accumulation tile can be used for full GEMMs at the start of
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// the K-loop.
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if constexpr (load_accum) {
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#pragma GCC unroll
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for (int wm_iter = 0; wm_iter < WMITER; wm_iter++) {
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#pragma GCC unroll
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for (int wn_iter = 0; wn_iter < WNITER; wn_iter++) {
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// FIXME: template parameter-ize BM
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wmma_load_accum(tid_in_warp, warp_col, warp_row, wn_iter, wm_iter, BN,
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local_c);
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}
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}
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}
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#pragma GCC unroll 1
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for (int i = 0; i < BK_LOOP; i++) {
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#pragma GCC unroll 4
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@@ -611,7 +676,7 @@ thread_block_gemm_single_tile(const T *local_a, const T *local_b, T *local_c,
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}
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}
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if constexpr (write_to_smem) {
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if constexpr (write_to_mem) {
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// need to protect smem reads in the earlier step from writes in below,
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// especially when the destination smem address overlaps with the input
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threadblock_barrier(threadblock_id_in_cluster,
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@@ -622,7 +687,7 @@ thread_block_gemm_single_tile(const T *local_a, const T *local_b, T *local_c,
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#pragma GCC unroll
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for (int wn_iter = 0; wn_iter < WNITER; wn_iter++) {
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wmma_store(tid_in_warp, warp_col, warp_row, wn_iter, wm_iter, BN,
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local_c);
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result_addr);
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}
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}
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}
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@@ -857,9 +922,11 @@ inline void thread_block_gemm(const T *A, const T *B, float *C,
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constexpr MemLayout layout_a =
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TRANSPOSE_AT_CONSUME ? MemLayout::K_major : MemLayout::MN_major;
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thread_block_gemm_single_tile<T, layout_a, MemLayout::MN_major,
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/*write_to_smem=*/false>(
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/*load_accum=*/false,
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/*write_to_mem=*/false>(
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local_a_consume, local_b_consume,
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static_cast<T *>(nullptr) /*ignore*/, tid_in_threadblock,
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static_cast<T *>(nullptr) /*ignore accum*/,
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static_cast<T *>(nullptr) /*ignore result*/, tid_in_threadblock,
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threads_per_threadblock, threadblocks_per_cluster,
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threadblock_id_in_cluster);
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