delete sources.txt

This commit is contained in:
Blaise Tine
2020-07-28 03:20:20 -07:00
parent 7415c2ecca
commit 1c9846d10b
2 changed files with 6 additions and 87 deletions

View File

@@ -65,20 +65,20 @@ run-ase-4c:
cd $(ASE_BUILD_DIR)_4c && make sim
clean-ase-1c:
rm -rf $(ASE_BUILD_DIR)_1c
rm -rf $(ASE_BUILD_DIR)_1c sources.txt
clean-ase-2c:
rm -rf $(ASE_BUILD_DIR)_2c
rm -rf $(ASE_BUILD_DIR)_2c sources.txt
clean-ase-4c:
rm -rf $(ASE_BUILD_DIR)_4c
rm -rf $(ASE_BUILD_DIR)_4c sources.txt
clean-fpga-1c:
rm -rf $(FPGA_BUILD_DIR)_1c
rm -rf $(FPGA_BUILD_DIR)_1c sources.txt
clean-fpga-2c:
rm -rf $(FPGA_BUILD_DIR)_2c
rm -rf $(FPGA_BUILD_DIR)_2c sources.txt
clean-fpga-4c:
rm -rf $(FPGA_BUILD_DIR)_4c
rm -rf $(FPGA_BUILD_DIR)_4c sources.txt

View File

@@ -1,81 +0,0 @@
+incdir+../rtl/libs
../rtl/libs/VX_countones.v
../rtl/libs/VX_divide.v
../rtl/libs/VX_fair_arbiter.v
../rtl/libs/VX_fixed_arbiter.v
../rtl/libs/VX_generic_queue.v
../rtl/libs/VX_generic_register.v
../rtl/libs/VX_generic_stack.v
../rtl/libs/VX_index_queue.v
../rtl/libs/VX_matrix_arbiter.v
../rtl/libs/VX_mult.v
../rtl/libs/VX_priority_encoder.v
../rtl/libs/VX_rr_arbiter.v
../rtl/libs/VX_onehot_encooder.v
+incdir+../rtl/cache
../rtl/cache/VX_bank.v
../rtl/cache/VX_bank_core_req_arb.v
../rtl/cache/VX_cache.v
../rtl/cache/VX_cache_core_req_bank_sel.v
../rtl/cache/VX_cache_core_rsp_merge.v
../rtl/cache/VX_cache_dram_fill_arb.v
../rtl/cache/VX_cache_dram_req_arb.v
../rtl/cache/VX_cache_miss_resrv.v
../rtl/cache/VX_prefetcher.v
../rtl/cache/VX_snp_forwarder.v
../rtl/cache/VX_snp_rsp_arb.v
../rtl/cache/VX_tag_data_access.v
../rtl/cache/VX_tag_data_structure.v
+incdir+../rtl/interfaces
../rtl/interfaces/VX_alu_req_if.v
../rtl/interfaces/VX_branch_ctl_if.v
../rtl/interfaces/VX_cache_core_req_if.v
../rtl/interfaces/VX_cache_core_rsp_if.v
../rtl/interfaces/VX_cache_dram_req_if.v
../rtl/interfaces/VX_cache_dram_rsp_if.v
../rtl/interfaces/VX_cache_snp_req_if.v
../rtl/interfaces/VX_cache_snp_rsp_if.v
../rtl/interfaces/VX_csr_req_if.v
../rtl/interfaces/VX_commit_if.v
../rtl/interfaces/VX_csr_io_req_if.v
../rtl/interfaces/VX_decode_if.v
../rtl/interfaces/VX_gpr_data_if.v
../rtl/interfaces/VX_gpu_req_if.v
../rtl/interfaces/VX_join_if.v
../rtl/interfaces/VX_lsu_req_if.v
../rtl/interfaces/VX_warp_ctl_if.v
../rtl/interfaces/VX_wb_if.v
../rtl/interfaces/VX_wstall_if.v
../rtl/interfaces/VX_csr_io_rsp_if.v
../rtl/interfaces/VX_ifetch_req_if.v
../rtl/interfaces/VX_ifetch_rsp_if.v
../rtl/interfaces/VX_mul_req_if.v
../rtl/interfaces/VX_perf_cntrs_if.v
+incdir+../rtl
../rtl/VX_alu_unit.v
../rtl/VX_commit.v
../rtl/VX_cluster.v
../rtl/VX_core.v
../rtl/VX_csr_data.v
../rtl/VX_csr_arb.v
../rtl/VX_dcache_arb.v
../rtl/VX_decode.v
../rtl/VX_csr_io_arb.v
../rtl/VX_fetch.v
../rtl/VX_csr_unit.v
../rtl/VX_gpr_ram.v
../rtl/VX_gpr_stage.v
../rtl/VX_execute.v
../rtl/VX_gpu_unit.v
../rtl/VX_icache_stage.v
../rtl/VX_issue.v
../rtl/VX_lsu_unit.v
../rtl/VX_mem_arb.v
../rtl/VX_mem_unit.v
../rtl/VX_pipeline.v
../rtl/VX_scheduler.v
../rtl/VX_issue_mux.v
../rtl/VX_warp_sched.v
../rtl/VX_writeback.v
../rtl/Vortex.v
../rtl/VX_mul_unit.v