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Before Fetch->FE

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This commit is contained in:
felsabbagh3
2019-09-08 18:09:11 -04:00
parent c310e7381f
commit ad45758a35
26 changed files with 229 additions and 157 deletions
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30
rtl/VX_fetch.v
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@@ -4,26 +4,21 @@
module VX_fetch (
input wire clk,
input wire reset,
input wire in_branch_dir,
input wire in_freeze,
input wire[31:0] in_branch_dest,
input wire in_memory_delay,
input wire in_branch_stall,
input wire in_fwd_stall,
input wire in_branch_stall_exe,
input wire in_clone_stall,
input wire in_jal,
input wire[31:0] in_jal_dest,
input wire in_interrupt,
input wire in_debug,
input wire[`NW_M1:0] in_memory_warp_num,
VX_icache_response_inter icache_response,
VX_icache_request_inter icache_request,
output wire out_delay,
output wire out_ebreak,
output wire[`NW_M1:0] out_which_wspawn,
VX_inst_meta_inter fe_inst_meta_fd,
VX_warp_ctl_inter VX_warp_ctl
VX_jal_response_inter VX_jal_rsp,
VX_branch_response_inter VX_branch_rsp,
VX_inst_meta_inter fe_inst_meta_fd,
VX_warp_ctl_inter VX_warp_ctl
);
wire in_change_mask = VX_warp_ctl.change_mask;
@@ -33,6 +28,9 @@ module VX_fetch (
wire[`NW_M1:0] in_decode_warp_num = VX_warp_ctl.warp_num;
wire in_freeze = out_delay || in_memory_delay;
wire in_thread_mask[`NT_M1:0];
genvar ind;
@@ -96,7 +94,7 @@ module VX_fetch (
assign out_ebreak = (in_decode_warp_num == 0) && in_ebreak;
assign stall = in_clone_stall || in_branch_stall || in_fwd_stall || in_branch_stall_exe || in_interrupt || in_freeze || in_debug;
assign stall = in_clone_stall || in_branch_stall || in_fwd_stall || in_branch_stall_exe || in_freeze;
assign out_which_wspawn = (warp_state+1);
@@ -140,8 +138,8 @@ module VX_fetch (
for (cur_warp = 0; cur_warp < `NW; cur_warp = cur_warp + 1)
begin
wire warp_zero_change_mask = in_change_mask && (in_decode_warp_num == cur_warp);
wire warp_zero_jal = in_jal && (in_memory_warp_num == cur_warp);
wire warp_zero_branch = in_branch_dir && (in_memory_warp_num == cur_warp);
wire warp_zero_jal = VX_jal_rsp.jal && (VX_jal_rsp.jal_warp_num == cur_warp);
wire warp_zero_branch = VX_branch_rsp.branch_dir && (VX_branch_rsp.branch_warp_num == cur_warp);
wire warp_zero_stall = stall || (warp_num != cur_warp);
wire warp_zero_wspawn = (cur_warp == 0) ? 0 : (in_wspawn && ((warp_state+1) == cur_warp));
wire[31:0] warp_zero_wspawn_pc = in_wspawn_pc;
@@ -159,9 +157,9 @@ module VX_fetch (
.in_thread_mask(in_thread_mask),
.in_change_mask(warp_zero_change_mask),
.in_jal (warp_zero_jal),
.in_jal_dest (in_jal_dest),
.in_jal_dest (VX_jal_rsp.jal_dest),
.in_branch_dir (warp_zero_branch),
.in_branch_dest(in_branch_dest),
.in_branch_dest(VX_branch_rsp.branch_dest),
.in_wspawn (warp_zero_wspawn),
.in_wspawn_pc (warp_zero_wspawn_pc),
.out_PC (warp_glob_pc[cur_warp]),

8
rtl/VX_memory.v
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@@ -11,8 +11,7 @@ module VX_memory (
output wire out_delay,
output wire out_branch_dir,
output wire[31:0] out_branch_dest,
VX_branch_response_inter VX_branch_rsp,
input wire[31:0] in_cache_driver_out_data[`NT_M1:0],
@@ -58,7 +57,7 @@ module VX_memory (
reg temp_branch_dir;
assign out_branch_dest = $signed(VX_mem_req.curr_PC) + ($signed(VX_mem_req.branch_offset) << 1);
assign VX_branch_rsp.branch_dest = $signed(VX_mem_req.curr_PC) + ($signed(VX_mem_req.branch_offset) << 1);
always @(*) begin
case(VX_mem_req.branch_type)
@@ -73,7 +72,8 @@ module VX_memory (
endcase // in_branch_type
end
assign out_branch_dir = temp_branch_dir;
assign VX_branch_rsp.branch_dir = temp_branch_dir;
assign VX_branch_rsp.branch_warp_num = VX_mem_req.warp_num;
endmodule // Memory

33
rtl/Vortex.v
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@@ -44,8 +44,6 @@ wire[31:0] e_m_csr_result;
// From memory
wire memory_delay;
wire memory_branch_dir;
wire[31:0] memory_branch_dest;
// From csr handler
wire[31:0] csr_decode_csr_data;
@@ -57,11 +55,7 @@ wire forwarding_fwd_stall;
// Internal
wire total_freeze;
wire interrupt;
wire debug;
assign debug = 1'b0;
assign interrupt = 1'b0;
assign total_freeze = fetch_delay || memory_delay;
assign out_ebreak = fetch_ebreak;
@@ -91,8 +85,12 @@ VX_forward_mem_inter VX_fwd_mem();
VX_forward_wb_inter VX_fwd_wb();
VX_forward_response_inter VX_fwd_rsp();
VX_icache_response_inter icache_response_fe;
VX_icache_request_inter icache_request_fe;
VX_icache_response_inter icache_response_fe();
VX_icache_request_inter icache_request_fe();
VX_branch_response_inter VX_branch_rsp();
VX_jal_response_inter VX_jal_rsp();
assign icache_response_fe.instruction = icache_response_instruction;
assign icache_request_pc_address = icache_request_fe.pc_address;
@@ -100,22 +98,17 @@ assign icache_request_pc_address = icache_request_fe.pc_address;
VX_fetch vx_fetch(
.clk (clk),
.reset (reset),
.in_branch_dir (memory_branch_dir),
.in_freeze (total_freeze),
.in_branch_dest (memory_branch_dest),
.in_memory_delay (memory_delay),
.in_branch_stall (decode_branch_stall),
.in_fwd_stall (forwarding_fwd_stall),
.in_branch_stall_exe(execute_branch_stall),
.in_clone_stall (decode_clone_stall),
.in_jal (e_m_jal),
.in_jal_dest (e_m_jal_dest),
.in_interrupt (interrupt),
.in_debug (debug),
.in_memory_warp_num (VX_mem_wb.warp_num),
.VX_jal_rsp (VX_jal_rsp),
.icache_response (icache_response_fe),
.VX_warp_ctl (VX_warp_ctl),
.icache_request (icache_request_fe),
.VX_branch_rsp (VX_branch_rsp),
.out_delay (fetch_delay),
.out_ebreak (fetch_ebreak),
.out_which_wspawn (fetch_which_warp),
@@ -156,6 +149,11 @@ VX_execute vx_execute(
.out_branch_stall (execute_branch_stall)
);
assign VX_jal_rsp.jal = e_m_jal;
assign VX_jal_rsp.jal_dest = e_m_jal_dest;
assign VX_jal_rsp.jal_warp_num = VX_mem_req.warp_num;
VX_e_m_reg vx_e_m_reg(
.clk (clk),
.reset (reset),
@@ -181,8 +179,7 @@ VX_memory vx_memory(
.VX_fwd_mem (VX_fwd_mem),
.out_delay (memory_delay),
.out_branch_dir (memory_branch_dir),
.out_branch_dest (memory_branch_dest),
.VX_branch_rsp (VX_branch_rsp),
.in_cache_driver_out_data (in_cache_driver_out_data),
.out_cache_driver_in_address (out_cache_driver_in_address),

BIN
rtl/interfaces/._VX_branch_response_inter.v Normal file
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BIN
rtl/interfaces/._VX_jal_response_inter.v Normal file
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31
rtl/interfaces/VX_branch_response_inter.v Normal file
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@@ -0,0 +1,31 @@
`include "VX_define.v"
`ifndef VX_BRANCH_RSP
`define VX_BRANCH_RSP
interface VX_branch_response_inter ();
wire branch_dir;
wire[31:0] branch_dest;
wire[`NW_M1:0] branch_warp_num;
// source-side view
modport snk (
input branch_dir,
input branch_dest
);
// source-side view
modport src (
output branch_dir,
output branch_dest
);
endinterface
`endif

33
rtl/interfaces/VX_jal_response_inter.v Normal file
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@@ -0,0 +1,33 @@
`include "VX_define.v"
`ifndef VX_JAL_RSP
`define VX_JAL_RSP
interface VX_jal_response_inter ();
wire jal;
wire[31:0] jal_dest;
wire[`NW_M1:0] jal_warp_num;
// source-side view
modport snk (
input jal,
input jal_dest,
input jal_warp_num
);
// source-side view
modport src (
output jal,
output jal_dest,
output jal_warp_num
);
endinterface
`endif

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rtl/obj_dir/VVortex
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86
rtl/obj_dir/VVortex.cpp
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@@ -25,6 +25,7 @@ VL_CTOR_IMP(VVortex) {
VL_CELL(__PVT__Vortex__DOT__VX_mem_wb, VVortex_VX_inst_mem_wb_inter);
VL_CELL(__PVT__Vortex__DOT__VX_warp_ctl, VVortex_VX_warp_ctl_inter);
VL_CELL(__PVT__Vortex__DOT__VX_writeback_inter, VVortex_VX_wb_inter);
VL_CELL(__PVT__Vortex__DOT__VX_branch_rsp, VVortex_VX_branch_response_inter);
VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req, VVortex_VX_frE_to_bckE_req_inter);
VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__fd_inst_meta_de, VVortex_VX_inst_meta_inter);
// Reset internal values
@@ -226,7 +227,7 @@ void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) {
// INITIAL at VX_context_slave.v:41
vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__clone_state_stall = 0U;
vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__wspawn_state_stall = 0U;
// INITIAL at VX_fetch.v:52
// INITIAL at VX_fetch.v:50
vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num = 0U;
vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state = 0U;
vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_count = 1U;
@@ -627,17 +628,15 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U]
= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 7U));
vlTOPp->Vortex__DOT__memory_branch_dest = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U]
<< 0x15U)
| (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
>> 0xbU))
+ ((
vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
<< 0x16U)
| (0x3ffffeU
& (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 0xaU))));
// ALWAYS at VX_memory.v:63
vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U]
<< 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
>> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
<< 0x16U) |
(0x3ffffeU &
(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 0xaU))));
// ALWAYS at VX_memory.v:62
vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir
= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
@@ -1349,7 +1348,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (0U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1360,7 +1359,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (1U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1371,7 +1370,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (2U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1382,7 +1381,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (3U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1393,7 +1392,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (4U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1404,7 +1403,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (5U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1415,7 +1414,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (6U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC
@@ -1426,7 +1425,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (7U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_alu.v:48
vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result
@@ -2410,7 +2409,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
= (1U & ((IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__temp_out_clone_stall)
| ((IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__glob_clone_stall)
>> 7U)));
// ALWAYS at VX_fetch.v:177
// ALWAYS at VX_fetch.v:175
if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var
= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc
@@ -4892,7 +4891,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][0U]
= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid
[0U];
// ALWAYS at VX_fetch.v:177
// ALWAYS at VX_fetch.v:175
if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U]
= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid
@@ -5117,7 +5116,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
? vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC
: ((IData)(4U)
+ vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC))));
// ALWAYS at VX_fetch.v:70
// ALWAYS at VX_fetch.v:68
vlTOPp->__Vdly__Vortex__DOT__vx_fetch__DOT__warp_num
= (0xfU & (((((IData)(vlTOPp->reset) | ((IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num)
>= (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_state)))
@@ -10821,17 +10820,15 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U]
= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 7U));
vlTOPp->Vortex__DOT__memory_branch_dest = (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U]
<< 0x15U)
| (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
>> 0xbU))
+ ((
vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
<< 0x16U)
| (0x3ffffeU
& (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 0xaU))));
// ALWAYS at VX_memory.v:63
vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U]
<< 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
>> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U]
<< 0x16U) |
(0x3ffffeU &
(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]
>> 0xaU))));
// ALWAYS at VX_memory.v:62
vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir
= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
@@ -11155,7 +11152,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (0U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11166,7 +11163,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (1U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11177,7 +11174,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (2U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11188,7 +11185,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (3U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11199,7 +11196,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (4U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11210,7 +11207,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (5U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11221,7 +11218,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (6U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC));
// ALWAYS at VX_warp.v:57
vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC
@@ -11232,7 +11229,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
>> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir)
& (7U == (0xfU
& vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
? vlTOPp->Vortex__DOT__memory_branch_dest
? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
: vlTOPp->Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC));
vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd
= (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U]
@@ -11352,7 +11349,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
| (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__internal_decode_branch_stall))
| (IData)(vlTOPp->Vortex__DOT__forwarding_fwd_stall))
| (IData)(vlTOPp->Vortex__DOT__execute_branch_stall));
// ALWAYS at VX_fetch.v:177
// ALWAYS at VX_fetch.v:175
if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__out_PC_var
= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_pc
@@ -13613,7 +13610,7 @@ VL_INLINE_OPT void VVortex::_combo__TOP__8(VVortex__Syms* __restrict vlSymsp) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid[7U][0U]
= vlTOPp->Vortex__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__7__KET____DOT__VX_Warp__out_valid
[0U];
// ALWAYS at VX_fetch.v:177
// ALWAYS at VX_fetch.v:175
if ((0U == (IData)(vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_num))) {
vlTOPp->Vortex__DOT__vx_fetch__DOT__out_valid_var[0U]
= vlTOPp->Vortex__DOT__vx_fetch__DOT__warp_glob_valid
@@ -13835,7 +13832,6 @@ void VVortex::_ctor_var_reset() {
}}
out_ebreak = VL_RAND_RESET_I(1);
Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1);
Vortex__DOT__memory_branch_dest = VL_RAND_RESET_I(32);
Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32);
Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1);
{ int __Vi0=0; for (; __Vi0<4; ++__Vi0) {

7
rtl/obj_dir/VVortex.h
View File

@@ -17,6 +17,7 @@ class VVortex_VX_mem_req_inter;
class VVortex_VX_inst_mem_wb_inter;
class VVortex_VX_warp_ctl_inter;
class VVortex_VX_wb_inter;
class VVortex_VX_branch_response_inter;
//----------
@@ -33,6 +34,7 @@ VL_MODULE(VVortex) {
VVortex_VX_inst_mem_wb_inter* __PVT__Vortex__DOT__VX_mem_wb;
VVortex_VX_warp_ctl_inter* __PVT__Vortex__DOT__VX_warp_ctl;
VVortex_VX_wb_inter* __PVT__Vortex__DOT__VX_writeback_inter;
VVortex_VX_branch_response_inter* __PVT__Vortex__DOT__VX_branch_rsp;
VVortex_VX_frE_to_bckE_req_inter* __PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req;
VVortex_VX_inst_meta_inter* __PVT__Vortex__DOT__vx_front_end__DOT__fd_inst_meta_de;
@@ -140,7 +142,6 @@ VL_MODULE(VVortex) {
VL_SIG16(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__alu_tempp,11,0);
VL_SIGW(Vortex__DOT__vx_csr_handler__DOT__csr,12299,0,385);
VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__decode_csr_address,11,0);
VL_SIG(Vortex__DOT__memory_branch_dest,31,0);
VL_SIG(Vortex__DOT__csr_decode_csr_data,31,0);
VL_SIG(Vortex__DOT__vx_fetch__DOT__out_PC_var,31,0);
VL_SIG(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC,31,0);
@@ -187,9 +188,9 @@ VL_MODULE(VVortex) {
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
};
struct {
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__rd1_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__rd2_register,127,0,4);
VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers,1023,0,32);
@@ -253,8 +254,6 @@ VL_MODULE(VVortex) {
VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0);
VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[4],0,0);
VL_SIG8(Vortex__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[4],0,0);
};
struct {
VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__in_valid[4],0,0);
};

36
rtl/obj_dir/VVortex_VX_branch_response_inter.cpp Normal file
View File

@@ -0,0 +1,36 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See VVortex.h for the primary calling header
#include "VVortex_VX_branch_response_inter.h"
#include "VVortex__Syms.h"
//--------------------
// STATIC VARIABLES
//--------------------
VL_CTOR_IMP(VVortex_VX_branch_response_inter) {
// Reset internal values
// Reset structure values
_ctor_var_reset();
}
void VVortex_VX_branch_response_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) {
if (0 && first) {} // Prevent unused
this->__VlSymsp = vlSymsp;
}
VVortex_VX_branch_response_inter::~VVortex_VX_branch_response_inter() {
}
//--------------------
// Internal Methods
void VVortex_VX_branch_response_inter::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex_VX_branch_response_inter::_ctor_var_reset\n"); );
// Body
branch_dest = VL_RAND_RESET_I(32);
}

14
rtl/obj_dir/VVortex___024unit.h → rtl/obj_dir/VVortex_VX_branch_response_inter.h
View File

@@ -2,8 +2,8 @@
// DESCRIPTION: Verilator output: Design internal header
// See VVortex.h for the primary calling header
#ifndef _VVortex___024unit_H_
#define _VVortex___024unit_H_
#ifndef _VVortex_VX_branch_response_inter_H_
#define _VVortex_VX_branch_response_inter_H_
#include "verilated.h"
@@ -11,12 +11,14 @@ class VVortex__Syms;
//----------
VL_MODULE(VVortex___024unit) {
VL_MODULE(VVortex_VX_branch_response_inter) {
public:
// PORTS
// LOCAL SIGNALS
// Begin mtask footprint all:
VL_SIG(branch_dest,31,0);
// LOCAL VARIABLES
@@ -29,10 +31,10 @@ VL_MODULE(VVortex___024unit) {
// CONSTRUCTORS
private:
VL_UNCOPYABLE(VVortex___024unit); ///< Copying not allowed
VL_UNCOPYABLE(VVortex_VX_branch_response_inter); ///< Copying not allowed
public:
VVortex___024unit(const char* name="TOP");
~VVortex___024unit();
VVortex_VX_branch_response_inter(const char* name="TOP");
~VVortex_VX_branch_response_inter();
// API METHODS

BIN
rtl/obj_dir/VVortex__ALL.a
View File

Binary file not shown.

1
rtl/obj_dir/VVortex__ALLcls.cpp
View File

@@ -3,6 +3,7 @@
#include "VVortex.cpp"
#include "VVortex_VX_mem_req_inter.cpp"
#include "VVortex_VX_inst_mem_wb_inter.cpp"
#include "VVortex_VX_branch_response_inter.cpp"
#include "VVortex_VX_inst_meta_inter.cpp"
#include "VVortex_VX_frE_to_bckE_req_inter.cpp"
#include "VVortex_VX_warp_ctl_inter.cpp"

7
rtl/obj_dir/VVortex__ALLcls.d
View File

@@ -2,8 +2,9 @@ VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilatedos.h VVortex__Syms.h \
VVortex_VX_mem_req_inter.h VVortex_VX_inst_mem_wb_inter.h \
VVortex_VX_inst_meta_inter.h VVortex_VX_frE_to_bckE_req_inter.h \
VVortex_VX_warp_ctl_inter.h VVortex_VX_wb_inter.h \
VVortex_VX_mem_req_inter.cpp VVortex_VX_inst_mem_wb_inter.cpp \
VVortex_VX_branch_response_inter.h VVortex_VX_inst_meta_inter.h \
VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_warp_ctl_inter.h \
VVortex_VX_wb_inter.h VVortex_VX_mem_req_inter.cpp \
VVortex_VX_inst_mem_wb_inter.cpp VVortex_VX_branch_response_inter.cpp \
VVortex_VX_inst_meta_inter.cpp VVortex_VX_frE_to_bckE_req_inter.cpp \
VVortex_VX_warp_ctl_inter.cpp VVortex_VX_wb_inter.cpp

BIN
rtl/obj_dir/VVortex__ALLcls.o
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Binary file not shown.

5
rtl/obj_dir/VVortex__ALLsup.d
View File

@@ -2,5 +2,6 @@ VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \
/usr/local/share/verilator/include/verilated.h \
/usr/local/share/verilator/include/verilatedos.h VVortex.h \
VVortex_VX_mem_req_inter.h VVortex_VX_inst_mem_wb_inter.h \
VVortex_VX_inst_meta_inter.h VVortex_VX_frE_to_bckE_req_inter.h \
VVortex_VX_warp_ctl_inter.h VVortex_VX_wb_inter.h
VVortex_VX_branch_response_inter.h VVortex_VX_inst_meta_inter.h \
VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_warp_ctl_inter.h \
VVortex_VX_wb_inter.h

BIN
rtl/obj_dir/VVortex__ALLsup.o
View File

Binary file not shown.

4
rtl/obj_dir/VVortex__Syms.cpp
View File

@@ -5,6 +5,7 @@
#include "VVortex.h"
#include "VVortex_VX_mem_req_inter.h"
#include "VVortex_VX_inst_mem_wb_inter.h"
#include "VVortex_VX_branch_response_inter.h"
#include "VVortex_VX_inst_meta_inter.h"
#include "VVortex_VX_frE_to_bckE_req_inter.h"
#include "VVortex_VX_warp_ctl_inter.h"
@@ -16,6 +17,7 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
: __Vm_namep(namep)
, __Vm_didInit(false)
// Setup submodule names
, TOP__Vortex__DOT__VX_branch_rsp (Verilated::catName(topp->name(),"Vortex.VX_branch_rsp"))
, TOP__Vortex__DOT__VX_exe_mem_req (Verilated::catName(topp->name(),"Vortex.VX_exe_mem_req"))
, TOP__Vortex__DOT__VX_mem_wb (Verilated::catName(topp->name(),"Vortex.VX_mem_wb"))
, TOP__Vortex__DOT__VX_warp_ctl (Verilated::catName(topp->name(),"Vortex.VX_warp_ctl"))
@@ -26,6 +28,7 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
// Pointer to top level
TOPp = topp;
// Setup each module's pointers to their submodules
TOPp->__PVT__Vortex__DOT__VX_branch_rsp = &TOP__Vortex__DOT__VX_branch_rsp;
TOPp->__PVT__Vortex__DOT__VX_exe_mem_req = &TOP__Vortex__DOT__VX_exe_mem_req;
TOPp->__PVT__Vortex__DOT__VX_mem_wb = &TOP__Vortex__DOT__VX_mem_wb;
TOPp->__PVT__Vortex__DOT__VX_warp_ctl = &TOP__Vortex__DOT__VX_warp_ctl;
@@ -34,6 +37,7 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
TOPp->__PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req = &TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req;
// Setup each module's pointer back to symbol table (for public functions)
TOPp->__Vconfigure(this, true);
TOP__Vortex__DOT__VX_branch_rsp.__Vconfigure(this, true);
TOP__Vortex__DOT__VX_exe_mem_req.__Vconfigure(this, true);
TOP__Vortex__DOT__VX_mem_wb.__Vconfigure(this, true);
TOP__Vortex__DOT__VX_warp_ctl.__Vconfigure(this, true);

2
rtl/obj_dir/VVortex__Syms.h
View File

@@ -13,6 +13,7 @@
#include "VVortex.h"
#include "VVortex_VX_mem_req_inter.h"
#include "VVortex_VX_inst_mem_wb_inter.h"
#include "VVortex_VX_branch_response_inter.h"
#include "VVortex_VX_inst_meta_inter.h"
#include "VVortex_VX_frE_to_bckE_req_inter.h"
#include "VVortex_VX_warp_ctl_inter.h"
@@ -28,6 +29,7 @@ class VVortex__Syms : public VerilatedSyms {
// SUBCELL STATE
VVortex* TOPp;
VVortex_VX_branch_response_inter TOP__Vortex__DOT__VX_branch_rsp;
VVortex_VX_mem_req_inter TOP__Vortex__DOT__VX_exe_mem_req;
VVortex_VX_inst_mem_wb_inter TOP__Vortex__DOT__VX_mem_wb;
VVortex_VX_warp_ctl_inter TOP__Vortex__DOT__VX_warp_ctl;

34
rtl/obj_dir/VVortex___024unit.cpp
View File

@@ -1,34 +0,0 @@
// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See VVortex.h for the primary calling header
#include "VVortex___024unit.h"
#include "VVortex__Syms.h"
//--------------------
// STATIC VARIABLES
//--------------------
VL_CTOR_IMP(VVortex___024unit) {
// Reset internal values
// Reset structure values
_ctor_var_reset();
}
void VVortex___024unit::__Vconfigure(VVortex__Syms* vlSymsp, bool first) {
if (0 && first) {} // Prevent unused
this->__VlSymsp = vlSymsp;
}
VVortex___024unit::~VVortex___024unit() {
}
//--------------------
// Internal Methods
void VVortex___024unit::_ctor_var_reset() {
VL_DEBUG_IF(VL_DBG_MSGF("+ VVortex___024unit::_ctor_var_reset\n"); );
}

2
rtl/obj_dir/VVortex__ver.d
View File

@@ -1 +1 @@
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v
obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_branch_response_inter.cpp obj_dir/VVortex_VX_branch_response_inter.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_branch_response_inter.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_jal_response_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v

50
rtl/obj_dir/VVortex__verFiles.dat
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@@ -8,17 +8,18 @@ S 1563 1573428 1567973468 0 1567973468 0 "VX_csr_han
S 17085 1574349 1567973680 0 1567973680 0 "VX_decode.v"
S 1676 1565244 1567474434 0 1567474434 0 "VX_define.v"
S 3835 1573272 1567973378 0 1567973378 0 "VX_execute.v"
S 6600 1582732 1567978356 0 1567978356 0 "VX_fetch.v"
S 6520 1598760 1567980382 0 1567980382 0 "VX_fetch.v"
S 6148 1573159 1567972050 0 1567972050 0 "VX_forwarding.v"
S 2016 1579094 1567976858 0 1567976858 0 "VX_front_end.v"
S 399 1565278 1567537322 0 1567537322 0 "VX_generic_register.v"
S 2697 1573280 1567972222 0 1567972222 0 "VX_memory.v"
S 2746 1610915 1567979674 0 1567979674 0 "VX_memory.v"
S 1249 1572596 1567702894 0 1567702894 0 "VX_register_file.v"
S 1655 1572598 1567702916 0 1567702916 0 "VX_register_file_master_slave.v"
S 1599 1572597 1567702888 0 1567702888 0 "VX_register_file_slave.v"
S 1915 1565256 1567474434 0 1567474434 0 "VX_warp.v"
S 1597 1573170 1567969318 0 1567969318 0 "VX_writeback.v"
S 6476 1582723 1567978530 0 1567978530 0 "Vortex.v"
S 6302 1598759 1567980528 0 1567980528 0 "Vortex.v"
S 389 1610834 1567980040 0 1567980040 0 "interfaces//VX_branch_response_inter.v"
S 528 1573270 1567972030 0 1567972030 0 "interfaces//VX_forward_exe_inter.v"
S 610 1573271 1567971856 0 1567971856 0 "interfaces//VX_forward_mem_inter.sv"
S 377 1582724 1567978250 0 1567978250 0 "interfaces//VX_forward_reqeust_inter.v"
@@ -29,30 +30,33 @@ S 279 1578590 1567975102 0 1567975102 0 "interfaces
S 315 1578593 1567975152 0 1567975152 0 "interfaces//VX_icache_response_inter.v"
S 679 1573336 1567972210 0 1567972210 0 "interfaces//VX_inst_mem_wb_inter.v"
S 444 1571666 1567552516 0 1567552516 0 "interfaces//VX_inst_meta_inter.v"
S 392 1599286 1567980328 0 1567980328 0 "interfaces//VX_jal_response_inter.v"
S 995 1572568 1567701364 0 1567701364 0 "interfaces//VX_mem_req_inter.v"
S 654 1573355 1567969270 0 1567969270 0 "interfaces//VX_mw_wb_inter.v"
S 603 1571976 1567568452 0 1567568452 0 "interfaces//VX_warp_ctl_inter.v"
S 450 1572588 1567702406 0 1567702406 0 "interfaces//VX_wb_inter.v"
T 1194320 1582760 1567978534 0 1567978534 0 "obj_dir/VVortex.cpp"
T 42410 1582757 1567978534 0 1567978534 0 "obj_dir/VVortex.h"
T 1791 1591287 1567978534 0 1567978534 0 "obj_dir/VVortex.mk"
T 1133 1591204 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
T 1208 1583850 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
T 882 1582868 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
T 1008 1582850 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
T 865 1582946 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
T 987 1582923 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_inst_meta_inter.h"
T 883 1582842 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
T 1005 1582838 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_mem_req_inter.h"
T 902 1591209 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
T 1017 1591205 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
T 821 1591283 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_wb_inter.cpp"
T 954 1591210 1567978534 0 1567978534 0 "obj_dir/VVortex_VX_wb_inter.h"
T 2312 1582736 1567978534 0 1567978534 0 "obj_dir/VVortex__Syms.cpp"
T 1435 1582735 1567978534 0 1567978534 0 "obj_dir/VVortex__Syms.h"
T 1534 1591288 1567978534 0 1567978534 0 "obj_dir/VVortex__ver.d"
T 0 0 1567978534 0 1567978534 0 "obj_dir/VVortex__verFiles.dat"
T 1423 1591284 1567978534 0 1567978534 0 "obj_dir/VVortex_classes.mk"
T 1194495 1599663 1567980530 0 1567980530 0 "obj_dir/VVortex.cpp"
T 42456 1598766 1567980530 0 1567980530 0 "obj_dir/VVortex.h"
T 1791 1603804 1567980530 0 1567980530 0 "obj_dir/VVortex.mk"
T 912 1599670 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_branch_response_inter.cpp"
T 1029 1599516 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_branch_response_inter.h"
T 1133 1599684 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
T 1208 1599682 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
T 882 1599460 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
T 1008 1599333 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
T 865 1599674 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
T 987 1599672 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_inst_meta_inter.h"
T 883 1599285 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
T 1005 1598769 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_mem_req_inter.h"
T 902 1599962 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
T 1017 1599816 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
T 821 1603751 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_wb_inter.cpp"
T 954 1600481 1567980530 0 1567980530 0 "obj_dir/VVortex_VX_wb_inter.h"
T 2594 1598762 1567980530 0 1567980530 0 "obj_dir/VVortex__Syms.cpp"
T 1551 1598761 1567980530 0 1567980530 0 "obj_dir/VVortex__Syms.h"
T 1697 1603805 1567980530 0 1567980530 0 "obj_dir/VVortex__ver.d"
T 0 0 1567980530 0 1567980530 0 "obj_dir/VVortex__verFiles.dat"
T 1459 1603752 1567980530 0 1567980530 0 "obj_dir/VVortex_classes.mk"
S 6179 1572602 1567698562 0 1567698562 0 "pipe_regs//VX_d_e_reg.v"
S 1538 1573254 1567973402 0 1567973402 0 "pipe_regs//VX_e_m_reg.v"
S 755 1591921 1567978394 0 1567978394 0 "pipe_regs//VX_f_d_reg.v"

1
rtl/obj_dir/VVortex_classes.mk
View File

@@ -20,6 +20,7 @@ VM_CLASSES_FAST += \
VVortex \
VVortex_VX_mem_req_inter \
VVortex_VX_inst_mem_wb_inter \
VVortex_VX_branch_response_inter \
VVortex_VX_inst_meta_inter \
VVortex_VX_frE_to_bckE_req_inter \
VVortex_VX_warp_ctl_inter \

BIN
rtl/obj_dir/test_bench.o
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Binary file not shown.

2
rtl/results.txt
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@@ -3,5 +3,5 @@
# of forwarding stalls: 0
# of branch stalls: 0
# CPI: 1.01056
# time to simulate: 2.181e-314 milliseconds
# time to simulate: 2.17354e-314 milliseconds
# GRADE: Failed on test: 4294967295