modelsim fixes && pipeline optimization

2020-07-28 14:20:23 -07:00
parent 1c9846d10b
commit c2dd0a8b39
38 changed files with 417 additions and 358 deletions
--- a/hw/rtl/VX_decode.v
+++ b/hw/rtl/VX_decode.v
@@ -1,5 +1,5 @@
-
 `include "VX_define.vh"
+`include "VX_print_instr.vh"

 module VX_decode  #(
    parameter CORE_ID = 0