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Author SHA1 Message Date
Santosh Srivatsan 01d183c6a9 Removed xlen.h 2022-02-01 13:59:39 -05:00
Santosh Srivatsan 3eb2b71955 removed traces of xlen. Overloaded sext 2022-02-01 13:54:51 -05:00
Santosh Srivatsan b23a9c76e7 Changed run-simx-32imf to run-simx to comply with the rest of the code 2022-02-01 13:26:41 -05:00
Santosh Srivatsan 0ce51df108 Removed simx64 comments 2022-02-01 13:25:26 -05:00
Santosh Srivatsan a73f656d06 Minor bug fixes 2022-01-31 17:01:14 -05:00
Santosh Srivatsan 4cf596338d Minor bug fixes 2022-01-31 15:53:49 -05:00
Santosh Srivatsan 7e3a2fdb0f Modifications to allow 64-bit riscv tests to run on travis CI 2022-01-27 15:55:19 -05:00
Santosh Srivatsan 7aa93a735d Added FLEN parameterization for RV32/64 F and D instructions 2022-01-24 15:42:15 -05:00
Santosh Srivatsan ad92c09f5b Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile 2022-01-22 13:47:44 -05:00
Santosh Srivatsan 91c22a2592 Fixed some riscv-tests 2022-01-22 12:54:10 -05:00
Santosh Srivatsan d762d401cd Added 64-bit linker script 2022-01-11 17:22:16 -05:00
Santosh Srivatsan d7e2a6b3b1 Minor update 2021-12-18 16:27:29 -05:00
Santosh Srivatsan a9e3104ce1 Removed ramulator log from tests/riscv/isa 2021-12-15 17:30:12 -05:00
Santosh Srivatsan f93303bac7 Minor update 2021-12-15 17:21:38 -05:00
Santosh Srivatsan 71acf4eadb Changed instruction size from wsize() * 4 to wsize() * 8 2021-12-13 20:42:44 -05:00
Santosh Srivatsan d8796efd89 Minor update 2021-12-13 20:39:40 -05:00
Santosh Srivatsan b1e82223ee Renamed rv_f* functions to rvf*_s to follow the naming convention between single and double precision floating point 2021-12-13 20:37:29 -05:00
Santosh Srivatsan 039f5eb733 Moved 64-bit riscv-tests to tests/riscv/isa from tests/riscv/isa64 2021-12-13 20:21:51 -05:00
Santosh Srivatsan d14e05e748 Removed all instances of my username \'ssrivatsan8\' and un-did the changes to vx_start.S 2021-12-13 20:01:11 -05:00
Santosh Srivatsan 76eb79d7fa Removed pipeline.cpp 2021-12-13 19:57:47 -05:00
Santosh Srivatsan 4abfca4cb2 Replaced all instanced of DoubleWord to DWord and DoubleWordI to DWordI 2021-12-13 19:55:02 -05:00
Santosh Srivatsan e82d5fe48f Removed all comments labelled \'simx64\' 2021-12-13 19:52:13 -05:00
Santosh Srivatsan 67daa6e616 Minor update 2021-12-11 17:58:31 -05:00
Santosh Srivatsan 427146d59b Removed 64-bit runtime and regression tests 2021-12-11 17:20:40 -05:00
Santosh Srivatsan 885bb58ca9 Merged RV64IMFD extensions to master branch 2021-12-11 17:06:29 -05:00
Santosh Srivatsan 3324b32a29 Moved Dockerfile to miscs 2021-12-10 21:54:41 -05:00
Santosh Srivatsan 5edb9098ce Merge branch 'simx64' 2021-12-10 21:48:29 -05:00
Santosh Srivatsan e7bc436b52 Renamed simX to simx 2021-12-10 16:57:29 -05:00
Santosh Srivatsan be499d6f38 Renamed simX to simx and added 64-bit riscv-tests 2021-12-10 16:56:12 -05:00
Santosh Srivatsan b8b3405efe Merge branch 'vortexgpgpu-master' 
Merged updated codebase with master branch.
 2021-12-10 16:41:43 -05:00
Santosh Srivatsan 0e38c39b62 Merge branch 'master' of https://github.com/vortexgpgpu/vortex into vortexgpgpu-master 2021-12-10 16:38:00 -05:00
Santosh Raghav Srivatsan bde789b320 Added support for RV32D and RV64D instructions 2021-12-10 16:30:24 -05:00
Blaise Tine d7737542e4 cache uuid support 2021-12-09 20:43:22 -05:00
Blaise Tine 0e2de4f13a prefetch test fixes 2021-12-09 04:54:10 -05:00
Blaise Tine fb6106267c Merge branch 'master' of https://github.com/vortexgpgpu/vortex 2021-12-09 00:00:28 -05:00
Blaise Tine 5825b7c15a dram simulator fix 2021-12-07 22:44:06 -05:00
Santosh Raghav Srivatsan e6eda67d0c Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension 2021-12-06 18:55:13 -05:00
Blaise Tine a9ec1c08a7 minor update 2021-12-06 15:44:25 -05:00
Blaise Tine 9811740ead minor update 2021-12-06 14:34:20 -05:00
Blaise Tine 71ce58500a minor update 2021-12-06 14:09:31 -05:00
Blaise Tine 30d9d3e956 minor update 2021-12-06 13:17:51 -05:00
Blaise Tine b741807f8c using ramulator dram simulator 2021-12-06 01:22:45 -05:00
Santosh Raghav Srivatsan 30a0d34151 Fixed Makefile 2021-12-05 15:55:43 -05:00
Blaise Tine 59232642c4 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2021-12-02 10:34:11 -08:00
Blaise Tine 38f166f090 texture unit hardware optimizations 2021-12-02 10:22:21 -08:00
Santosh Raghav Srivatsan 3784da0d2f riscv-tests work on simx 2021-12-01 19:41:16 -05:00
Blaise Tine 189cec3ca2 minor update 2021-12-01 10:36:50 -05:00
Santosh Raghav Srivatsan f0dc04ad04 Added tests to commit. 64 bit simx still not working 2021-12-01 02:44:14 -05:00
Blaise Tine 092ff42ab4 simx multicore fix 2021-12-01 00:12:16 -05:00
Blaise Tine 4477cbeed1 blackbox caching fix 2021-11-30 15:36:59 -05:00