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Lingjun Zhu 5680b997b5 Generate LIB files for rf2_32x128_wm1
2019-10-14 17:08:18 -04:00
emulator
Added Bug coments
2019-06-12 08:26:04 -07:00
kernel
New Warp Scheduler + VCD Enable
2019-09-15 00:12:41 -04:00
models/memory/cln28hpc/rf2_32x128_wm1
Generate LIB files for rf2_32x128_wm1
2019-10-14 17:08:18 -04:00
rtl
Implemented the GPR model with the CLN28HPC memory block
2019-10-13 20:27:28 -04:00
.DS_Store
ram stdint + Quartus Files
2019-06-11 21:13:30 -07:00
.gitignore
New Warp Scheduler + VCD Enable
2019-09-15 00:12:41 -04:00
README.md
Added a README
2019-03-22 04:29:24 -04:00
results.txt
Less expensive but slower fetch logic
2019-05-05 22:55:47 -04:00
TODO
updated TODO
2019-03-31 05:22:42 -04:00

README.md

Vortex RISC-V GPGPU

Vortex currently supported RV32IM.

./Kernel is a demo of exposing the warps and threads to a program. (Stable)

./emulator is an emulator for RV32IM with warp and thread support. (Stable)

./rtl is verilog for the processor. Currently supports RV32IM and passes all tests.

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