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Fix test for DPU

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This commit is contained in:
Hansung Kim
2024-05-28 21:18:51 -07:00
parent 793db0e29d
commit 40b27c9600
1 changed files with 11 additions and 6 deletions
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17
src/test/scala/radiance/TensorDPUTest.scala
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@@ -41,17 +41,19 @@ class MulAddTest extends AnyFlatSpec with ChiselScalatestTester {
}
}
class DPUPipeTest extends AnyFlatSpec with ChiselScalatestTester {
behavior of "DPUPipe"
class TensorDotProductUnitTest extends AnyFlatSpec with ChiselScalatestTester {
behavior of "TensorDotProductUnit"
implicit val p: Parameters = Parameters.empty
it should "pass" in {
test(new DPUPipe)
// .withAnnotations(Seq(VerilatorBackendAnnotation, WriteFstAnnotation))
// .withAnnotations(Seq(WriteVcdAnnotation))
test(new TensorDotProductUnit)
.withAnnotations(Seq(VerilatorBackendAnnotation))
.withAnnotations(Seq(WriteVcdAnnotation))
{ c =>
c.io.in.valid.poke(true.B)
c.io.stall.poke(false.B)
// (2,2,2,2)*(2,2,2,2) + 3 = 19
c.io.in.bits.a(0).poke(0x40000000L.U(64.W))
c.io.in.bits.a(1).poke(0x40000000L.U(64.W))
c.io.in.bits.a(2).poke(0x40000000L.U(64.W))
@@ -64,13 +66,16 @@ class DPUPipeTest extends AnyFlatSpec with ChiselScalatestTester {
c.clock.step()
c.io.in.valid.poke(false.B)
// stall the pipeline
// c.io.stall.poke(true.B)
c.clock.step()
c.io.stall.poke(false.B)
c.clock.step()
c.clock.step()
// 4-cycle latency
c.io.out.valid.expect(true.B)
c.io.out.bits.data.expect(0x40e00000L.U)
c.io.out.bits.data.expect(0x41980000L.U)
c.clock.step()