minor update

hw/rtl/VX_print_instr.vh

@@ -4,9 +4,9 @@
 `include "VX_define.vh"
 
 task print_ex_type (
-    input [`EX_BITS-1:0] ex
+    input [`EX_BITS-1:0] ex_type
 );
-    case (ex)
+    case (ex_type)
         `EX_ALU: $write("ALU");     
         `EX_LSU: $write("LSU");
         `EX_CSR: $write("CSR");

hw/rtl/cache/VX_shared_mem.v

@@ -222,7 +222,7 @@ module VX_shared_mem #(
 
 `ifdef DBG_PRINT_CACHE_BANK
     always @(posedge clk) begin        
-        if (crsq_full) begin
+        if (!crsq_in_ready) begin
             $display("%t: cache%0d pipeline-stall", $time, CACHE_ID);
         end
         if (creq_pop) begin