scope fixes
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driver/tests/basic/kernel.bin
Normal file → Executable file
0
driver/tests/basic/kernel.bin
Normal file → Executable file
@@ -397,8 +397,16 @@
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`define SCOPE_ASSIGN(d,s) assign d = s
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`else
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`define SCOPE_SIGNALS_IO
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`define SCOPE_SIGNALS_ATTACH
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`define SCOPE_SIGNALS_ICACHE_IO
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`define SCOPE_SIGNALS_DCACHE_IO
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`define SCOPE_SIGNALS_DRAM_IO
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`define SCOPE_SIGNALS_CORE_IO
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`define SCOPE_SIGNALS_ICACHE_ATTACH
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`define SCOPE_SIGNALS_DCACHE_ATTACH
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`define SCOPE_SIGNALS_DRAM_ATTACH
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`define SCOPE_SIGNALS_CORE_ATTACH
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`define SCOPE_ASSIGN(d,s)
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`endif
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@@ -233,12 +233,12 @@ bool Simulator::run() {
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// check riscv-tests PASSED/FAILED status
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#if (NUM_CLUSTERS == 1 && NUM_CORES == 1)
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int status = (int)vortex_->Vortex_Socket->genblk1__DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->back_end->writeback->last_data_wb & 0xf;
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int status = (int)vortex_->Vortex_Socket->genblk1__DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->pipeline->back_end->writeback->last_data_wb & 0xf;
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#else
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#if (NUM_CLUSTERS == 1)
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int status = (int)vortex_->Vortex_Socket->genblk1__DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->back_end->writeback->last_data_wb & 0xf;
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int status = (int)vortex_->Vortex_Socket->genblk1__DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->pipeline->back_end->writeback->last_data_wb & 0xf;
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#else
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int status = (int)vortex_->Vortex_Socket->genblk2__DOT__genblk1__BRA__0__KET____DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->back_end->writeback->last_data_wb & 0xf;
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int status = (int)vortex_->Vortex_Socket->genblk2__DOT__genblk1__BRA__0__KET____DOT__Vortex_Cluster->genblk1__BRA__0__KET____DOT__vortex_core->pipeline->back_end->writeback->last_data_wb & 0xf;
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#endif
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#endif
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