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RTL code refactoring

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This commit is contained in:
Blaise Tine
2020-04-20 13:52:24 -04:00
parent 94e4f056db
commit 1a2823da0d
31 changed files with 253 additions and 260 deletions
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4
hw/rtl/cache/VX_cache_dfq_queue.v vendored
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@@ -79,9 +79,9 @@ module VX_cache_dfq_queue #(
.clk (clk),
.reset (reset),
.push (push_qual),
.in_data ({per_bank_dram_fill_req_valid, per_bank_dram_fill_req_addr}),
.data_i ({per_bank_dram_fill_req_valid, per_bank_dram_fill_req_addr}),
.pop (pop_qual),
.out_data({out_per_bank_dram_fill_req, out_per_bank_dram_fill_req_addr}),
.data_o({out_per_bank_dram_fill_req, out_per_bank_dram_fill_req_addr}),
.empty (o_empty),
.full (dfqq_full)
);