cache refactoring - phase 3 - added dedicated pipeline stage for tag access

2020-11-04 03:21:30 -08:00
parent cd8ce20bd6
commit 4c6a74fa87
11 changed files with 545 additions and 339 deletions
--- a/hw/rtl/libs/VX_generic_queue.v
+++ b/hw/rtl/libs/VX_generic_queue.v
@@ -114,6 +114,7 @@ module VX_generic_queue #(
                .waddr(wr_ptr_a),                                
                .raddr(rd_ptr_a),
                .wren(push),
+                .byteen(1'b1),
                .rden(pop),
                .din(data_in),
                .dout(data_out)
@@ -166,6 +167,7 @@ module VX_generic_queue #(
                .waddr(wr_ptr_r),                                
                .raddr(rd_ptr_n_r),
                .wren(push),
+                .byteen(1'b1),
                .rden(pop),
                .din(data_in),
                .dout(dout)