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Added pending request check. This applies when 1) mrvq entery is valid/ready but not head, then a core request hits 2) snoop when pending write. A pending miss request is either a valid entry in mrvq OR a miss entery in st2

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This commit is contained in:
felsabbagh3
2020-05-12 21:25:13 -07:00
parent b0b38f6c24
commit b08b80156d
4 changed files with 124 additions and 66 deletions
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4
hw/rtl/cache/VX_cache_config.vh vendored
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@@ -3,8 +3,8 @@
`include "VX_define.vh"
// data tid tag read write base addr
`define MRVQ_METADATA_WIDTH (`WORD_WIDTH + `REQS_BITS + CORE_TAG_WIDTH + `BYTE_EN_BITS + `BYTE_EN_BITS + `BASE_ADDR_BITS)
// data tid tag read write base addr is_snp
`define MRVQ_METADATA_WIDTH (`WORD_WIDTH + `REQS_BITS + CORE_TAG_WIDTH + `BYTE_EN_BITS + `BYTE_EN_BITS + `BASE_ADDR_BITS + 1)
// tag read write reqs
`define REQ_INST_META_WIDTH (CORE_TAG_WIDTH + `BYTE_EN_BITS + `BYTE_EN_BITS + `REQS_BITS)